{"type": "func", "start": 1051304, "end": 1052140, "name": "sub_100AA8", "pseudocode": "// \n// sub_100AA8 from 0x100aa8 to 0x100dec (836 bytes)\n// \n// 1 xrefs:\n// > @ 0x118b10\n// \n// This function is hookable on this platform!\n// \n// Using BromaIDA 8.0.0 @ https://github.com/Stazzical/BromaIDA\n// Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings\n// \n\nfloat32x2_t *__fastcall sub_100AA8(\n float32x2_t *result,\n float32x4_t *s,\n unsigned int a3,\n float *a4,\n __int64 a5,\n __int64 a6,\n int a7)\n{\n float v7; // s6\n float32x2_t v8; // d0\n float v9; // s7\n float32x2_t v10; // d1\n float v11; // s5\n float32x2_t v12; // d2\n float32x2_t v13; // d30\n float v14; // s17\n float v15; // s31\n float32x2_t v16; // d3\n float v17; // s16\n float32x2_t v18; // d4\n float32x4_t *v20; // x19\n float32x2_t *v21; // x20\n float32x2_t v22; // d8\n unsigned int i; // w8\n unsigned __int64 v24; // d4\n unsigned __int64 v25; // d5\n unsigned __int64 v26; // d6\n unsigned __int64 v27; // d7\n __int64 v28; // x8\n float32x2_t v29; // d0\n float32x4_t v30; // q18\n float32x4_t v31; // q19\n float32x4_t v32; // q20\n float32x4_t v33; // q21\n float32x4_t v34; // q22\n float32x4_t v35; // q23\n unsigned int v36; // w8\n int32x4_t v37; // t1\n int v38; // w8\n float v39; // s18\n float v40; // s19\n int32x4_t v41; // t1\n float32x4_t v42; // q26\n float32x4_t v43; // q24\n int v44; // w8\n float *v45; // x9\n float32x2_t v46; // d5\n float32x2_t v47; // d17\n float32x2_t v48; // d18\n float32x2_t v49; // d5\n float32x2_t v50; // d16\n unsigned __int64 v51; // d7\n float v52; // [xsp+0h] [xbp-50h]\n float v53; // [xsp+10h] [xbp-40h]\n\n v7 = a4[161];\n v8.n64_f32[0] = a4[64];\n v9 = a4[96];\n v10.n64_f32[0] = a4[128];\n v11 = a4[160];\n v13.n64_f32[0] = *a4;\n v12.n64_f32[0] = a4[1];\n v14 = a4[32];\n v15 = a4[33];\n v16.n64_f32[0] = a4[65];\n v17 = a4[97];\n v18.n64_f32[0] = a4[129];\n v20 = s;\n v21 = result;\n if ( fabsf(v7) >= 0.00002\n || fabsf(v11) >= 0.00002\n || fabsf(v18.n64_f32[0]) >= 0.00002\n || fabsf(v10.n64_f32[0]) >= 0.00002\n || fabsf(v17) >= 0.00002\n || fabsf(v9) >= 0.00002\n || fabsf(v8.n64_f32[0]) >= 0.00002\n || fabsf(v14) >= 0.00002\n || fabsf(v12.n64_f32[0]) >= 0.00002\n || fabsf(v16.n64_f32[0]) >= 0.00002 )\n {\n v30.n128_f32[0] = *a4;\n v31.n128_f32[0] = a4[128];\n v32.n128_f32[0] = a4[64];\n v33.n128_f32[0] = a4[1];\n v34.n128_f32[0] = a4[129];\n v35.n128_f32[0] = a4[65];\n v30.n128_f32[1] = a4[32];\n v31.n128_f32[1] = a4[160];\n v32.n128_f32[1] = a4[96];\n v33.n128_f32[1] = a4[33];\n v34.n128_f32[1] = a4[161];\n v35.n128_f32[1] = a4[97];\n v30.n128_u64[1] = __PAIR64__(LODWORD(v9), v8.n64_u32[0]);\n v31.n128_u64[1] = __PAIR64__(LODWORD(v14), v13.n64_u32[0]);\n v32.n128_u64[1] = __PAIR64__(LODWORD(v11), v10.n64_u32[0]);\n v33.n128_u64[1] = __PAIR64__(LODWORD(v17), v16.n64_u32[0]);\n v34.n128_u64[1] = __PAIR64__(LODWORD(v15), v12.n64_u32[0]);\n v35.n128_u64[1] = __PAIR64__(LODWORD(v7), v18.n64_u32[0]);\n v36 = a3 >> 1;\n if ( a7 )\n {\n for ( ; v36; v20 += 3 )\n {\n v37 = *(int32x4_t *)v21->n64_u64;\n v21 += 2;\n --v36;\n v20[1] = vmlaq_f32(vmulq_f32(vtrn1q_s32(v37, v37), v31), v34, vtrn2q_s32(v37, v37));\n v20[2] = vmlaq_laneq_f32(vmulq_laneq_f32(v32, v37, 2), v35, v37, 3);\n *v20 = vmlaq_lane_f32(vmulq_n_f32(v30, v37.n128_f32[0]), v33, (float32x2_t)v37.n128_u64[0], 1);\n }\n v38 = a3 & 1;\n if ( (a3 & 1) != 0 )\n {\n do\n {\n v39 = v21->n64_f32[0];\n v40 = v21->n64_f32[1];\n ++v21;\n --v38;\n v20->n128_f32[0] = (float)(v39 * v13.n64_f32[0]) + (float)(v40 * v12.n64_f32[0]);\n v20->n128_f32[1] = (float)(v39 * v14) + (float)(v40 * v15);\n v20->n128_f32[2] = (float)(v39 * v8.n64_f32[0]) + (float)(v40 * v16.n64_f32[0]);\n v20->n128_f32[3] = (float)(v39 * v9) + (float)(v40 * v17);\n v20[1].n128_f32[0] = (float)(v39 * v10.n64_f32[0]) + (float)(v40 * v18.n64_f32[0]);\n v20[1].n128_f32[1] = (float)(v39 * v11) + (float)(v40 * v7);\n v20 = (float32x4_t *)((char *)v20 + 24);\n }\n while ( v38 );\n }\n }\n else\n {\n while ( v36 )\n {\n v41 = *(int32x4_t *)v21->n64_u64;\n v21 += 2;\n --v36;\n v42 = vmlaq_f32(vmlaq_f32(v20[1], v31, vtrn1q_s32(v41, v41)), v34, vtrn2q_s32(v41, v41));\n v43 = vaddq_f32(vmlaq_laneq_f32(vmulq_laneq_f32(v32, v41, 2), v35, v41, 3), v20[2]);\n *v20 = vmlaq_lane_f32(vmlaq_n_f32(*v20, v30, v41.n128_f32[0]), v33, (float32x2_t)v41.n128_u64[0], 1);\n v20[1] = v42;\n v20[2] = v43;\n v20 += 3;\n }\n v44 = a3 & 1;\n v12.n64_f32[1] = v15;\n v13.n64_f32[1] = v14;\n v16.n64_f32[1] = v17;\n v8.n64_f32[1] = v9;\n v18.n64_f32[1] = v7;\n v10.n64_f32[1] = v11;\n if ( (a3 & 1) != 0 )\n {\n do\n {\n v46.n64_u64[0] = vld1_dup_f32((const float *)v21).n64_u64[0];\n v45 = (float *)v21 + 1;\n --v44;\n ++v21;\n v47.n64_u64[0] = vmul_f32(v46, v13).n64_u64[0];\n v48.n64_u64[0] = vmul_f32(v46, v8).n64_u64[0];\n v49.n64_u64[0] = vmla_n_f32(vmul_f32(v46, v10), v18, *v45).n64_u64[0];\n v50.n64_u64[0] = v20[1].n128_u64[0];\n v51 = vadd_f32(vmla_n_f32(v48, v16, *v45), *(float32x2_t *)&v20->n128_i8[8]).n64_u64[0];\n v20->n128_u64[0] = vadd_f32(vmla_n_f32(v47, v12, *v45), (float32x2_t)v20->n128_u64[0]).n64_u64[0];\n v20->n128_u64[1] = v51;\n v20[1].n128_u64[0] = vadd_f32(v49, v50).n64_u64[0];\n v20 = (float32x4_t *)((char *)v20 + 24);\n }\n while ( v44 );\n }\n }\n }\n else\n {\n v22.n64_u64[0] = __PAIR64__(LODWORD(v15), v13.n64_u32[0]);\n if ( a7 )\n {\n v52 = a4[33];\n v53 = *a4;\n result = (float32x2_t *)memset(s, 0, 24LL * a3);\n v15 = v52;\n v13.n64_f32[0] = v53;\n }\n for ( i = a3 >> 2; i; --i )\n {\n v24 = vmla_f32((float32x2_t)v20->n128_u64[0], v22, (float32x2_t)v21->n64_u64[0]).n64_u64[0];\n v25 = vmla_f32(*(float32x2_t *)&v20[1].n128_i8[8], v22, v21[1]).n64_u64[0];\n v26 = vmla_f32((float32x2_t)v20[3].n128_u64[0], v22, v21[2]).n64_u64[0];\n v27 = vmla_f32(*(float32x2_t *)&v20[4].n128_i8[8], v22, v21[3]).n64_u64[0];\n v21 += 4;\n v20->n128_u64[0] = v24;\n v20[1].n128_u64[1] = v25;\n v20[3].n128_u64[0] = v26;\n v20[4].n128_u64[1] = v27;\n v20 += 6;\n }\n v28 = 0;\n v13.n64_f32[1] = v15;\n while ( (a3 & 3) != (_DWORD)v28 )\n {\n v29.n64_u64[0] = (unsigned __int64)v21[v28++];\n v20->n128_u64[0] = vmla_f32((float32x2_t)v20->n128_u64[0], v13, v29).n64_u64[0];\n v20 = (float32x4_t *)((char *)v20 + 24);\n }\n }\n return result;\n}", "assembly": "; \n; sub_100AA8 from 0x100aa8 to 0x100dec (836 bytes)\n; \n; 1 xrefs:\n; > @ 0x118b10\n; \n; This function is hookable on this platform!\n; \n; Using BromaIDA 8.0.0 @ https:;github.com/Stazzical/BromaIDA\n; Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https:;github.com/geode-sdk/bindings\n; \n\nSUB SP, SP, #0x60 ; +0x0, 0x100aa8\nADRP X8, #dword_2EFF4@PAGE ; +0x4, 0x100aac\nLDR S6, [X3,#0x284] ; +0x8, 0x100ab0\nLDR S18, [X8,#dword_2EFF4@PAGEOFF] ; +0xc, 0x100ab4\nLDR S0, [X3,#0x100] ; +0x10, 0x100ab8\nLDR S7, [X3,#0x180] ; +0x14, 0x100abc\nLDR S1, [X3,#0x200] ; +0x18, 0x100ac0\nLDR S5, [X3,#0x280] ; +0x1c, 0x100ac4\nLDP S30, S2, [X3] ; +0x20, 0x100ac8\nLDP S17, S31, [X3,#0x80] ; +0x24, 0x100acc\nLDR S3, [X3,#0x104] ; +0x28, 0x100ad0\nLDR S16, [X3,#0x184] ; +0x2c, 0x100ad4\nLDR S4, [X3,#0x204] ; +0x30, 0x100ad8\nFABS S19, S6 ; +0x34, 0x100adc\nSTR X21, [SP,#0x50+var_18] ; +0x38, 0x100ae0\nSTP X20, X19, [SP,#0x50+var_10] ; +0x3c, 0x100ae4\nMOV W21, W2 ; +0x40, 0x100ae8\nMOV X19, X1 ; +0x44, 0x100aec\nFCMP S19, S18 ; +0x48, 0x100af0\nMOV X20, X0 ; +0x4c, 0x100af4\nSTR D8, [SP,#0x50+var_20] ; +0x50, 0x100af8\nSTP X29, X30, [SP,#0x50+var_s0] ; +0x54, 0x100afc\nADD X29, SP, #0x50 ; +0x58, 0x100b00\nB.GE loc_100C28 ; +0x5c, 0x100b04\nFABS S19, S5 ; +0x60, 0x100b08\nFCMP S19, S18 ; +0x64, 0x100b0c\nB.GE loc_100C28 ; +0x68, 0x100b10\nFABS S19, S4 ; +0x6c, 0x100b14\nFCMP S19, S18 ; +0x70, 0x100b18\nB.GE loc_100C28 ; +0x74, 0x100b1c\nFABS S19, S1 ; +0x78, 0x100b20\nFCMP S19, S18 ; +0x7c, 0x100b24\nB.GE loc_100C28 ; +0x80, 0x100b28\nFABS S19, S16 ; +0x84, 0x100b2c\nFCMP S19, S18 ; +0x88, 0x100b30\nB.GE loc_100C28 ; +0x8c, 0x100b34\nFABS S19, S7 ; +0x90, 0x100b38\nFCMP S19, S18 ; +0x94, 0x100b3c\nB.GE loc_100C28 ; +0x98, 0x100b40\nFABS S19, S0 ; +0x9c, 0x100b44\nFCMP S19, S18 ; +0xa0, 0x100b48\nB.GE loc_100C28 ; +0xa4, 0x100b4c\nFABS S19, S17 ; +0xa8, 0x100b50\nFCMP S19, S18 ; +0xac, 0x100b54\nB.GE loc_100C28 ; +0xb0, 0x100b58\nFABS S19, S2 ; +0xb4, 0x100b5c\nFCMP S19, S18 ; +0xb8, 0x100b60\nB.GE loc_100C28 ; +0xbc, 0x100b64\nFABS S19, S3 ; +0xc0, 0x100b68\nFCMP S19, S18 ; +0xc4, 0x100b6c\nB.GE loc_100C28 ; +0xc8, 0x100b70\nSTP S30, S31, [SP,#0x50+var_30] ; +0xcc, 0x100b74\nLDR D8, [SP,#0x50+var_30] ; +0xd0, 0x100b78\nSTR XZR, [SP,#0x50+var_28] ; +0xd4, 0x100b7c\nCBZ W6, loc_100BA4 ; +0xd8, 0x100b80\nADD W8, W21, W21,LSL#1 ; +0xdc, 0x100b84\nLSL W8, W8, #1 ; +0xe0, 0x100b88\nLSL X2, X8, #2; n ; +0xe4, 0x100b8c\nMOV X0, X19; s ; +0xe8, 0x100b90\nMOV W1, WZR; c ; +0xec, 0x100b94\nSTP Q31, Q30, [SP,#0x50+var_50] ; +0xf0, 0x100b98\nBL .memset ; +0xf4, 0x100b9c\nLDP Q31, Q30, [SP,#0x50+var_50] ; +0xf8, 0x100ba0\nLSR W8, W21, #2 ; +0xfc, 0x100ba4\nCBZ W8, loc_100BF4 ; +0x100, 0x100ba8\nLDP D0, D1, [X20] ; +0x104, 0x100bac\nLDP D2, D3, [X20,#0x10] ; +0x108, 0x100bb0\nLDR D4, [X19] ; +0x10c, 0x100bb4\nLDR D5, [X19,#0x18] ; +0x110, 0x100bb8\nLDR D6, [X19,#0x30] ; +0x114, 0x100bbc\nLDR D7, [X19,#0x48] ; +0x118, 0x100bc0\nFMLA V4.2S, V8.2S, V0.2S ; +0x11c, 0x100bc4\nFMLA V5.2S, V8.2S, V1.2S ; +0x120, 0x100bc8\nFMLA V6.2S, V8.2S, V2.2S ; +0x124, 0x100bcc\nFMLA V7.2S, V8.2S, V3.2S ; +0x128, 0x100bd0\nADD X20, X20, #0x20 ; ' ' ; +0x12c, 0x100bd4\nSTR D4, [X19] ; +0x130, 0x100bd8\nSTR D5, [X19,#0x18] ; +0x134, 0x100bdc\nSTR D6, [X19,#0x30] ; +0x138, 0x100be0\nSTR D7, [X19,#0x48] ; +0x13c, 0x100be4\nADD X19, X19, #0x60 ; '`' ; +0x140, 0x100be8\nSUB W8, W8, #1 ; +0x144, 0x100bec\nCBNZ W8, loc_100BAC ; +0x148, 0x100bf0\nMOV X8, XZR ; +0x14c, 0x100bf4\nINS V30.S[1], V31.S[0] ; +0x150, 0x100bf8\nAND X9, X21, #3 ; +0x154, 0x100bfc\nCMP W9, W8 ; +0x158, 0x100c00\nB.EQ loc_100DD4 ; +0x15c, 0x100c04\nMOV X10, X19 ; +0x160, 0x100c08\nLDR D0, [X20,X8,LSL#3] ; +0x164, 0x100c0c\nLDR D1, [X10],#0x18 ; +0x168, 0x100c10\nADD X8, X8, #1 ; +0x16c, 0x100c14\nFMLA V1.2S, V30.2S, V0.2S ; +0x170, 0x100c18\nSTR D1, [X19] ; +0x174, 0x100c1c\nMOV X19, X10 ; +0x178, 0x100c20\nB loc_100C00 ; +0x17c, 0x100c24\nMOV V18.16B, V30.16B ; +0x180, 0x100c28\nMOV V19.16B, V1.16B ; +0x184, 0x100c2c\nMOV V20.16B, V0.16B ; +0x188, 0x100c30\nMOV V21.16B, V2.16B ; +0x18c, 0x100c34\nMOV V22.16B, V4.16B ; +0x190, 0x100c38\nMOV V23.16B, V3.16B ; +0x194, 0x100c3c\nINS V18.S[1], V17.S[0] ; +0x198, 0x100c40\nINS V19.S[1], V5.S[0] ; +0x19c, 0x100c44\nINS V20.S[1], V7.S[0] ; +0x1a0, 0x100c48\nINS V21.S[1], V31.S[0] ; +0x1a4, 0x100c4c\nINS V22.S[1], V6.S[0] ; +0x1a8, 0x100c50\nINS V23.S[1], V16.S[0] ; +0x1ac, 0x100c54\nINS V18.S[2], V0.S[0] ; +0x1b0, 0x100c58\nINS V19.S[2], V30.S[0] ; +0x1b4, 0x100c5c\nINS V20.S[2], V1.S[0] ; +0x1b8, 0x100c60\nINS V21.S[2], V3.S[0] ; +0x1bc, 0x100c64\nINS V22.S[2], V2.S[0] ; +0x1c0, 0x100c68\nINS V23.S[2], V4.S[0] ; +0x1c4, 0x100c6c\nINS V18.S[3], V7.S[0] ; +0x1c8, 0x100c70\nINS V19.S[3], V17.S[0] ; +0x1cc, 0x100c74\nINS V20.S[3], V5.S[0] ; +0x1d0, 0x100c78\nINS V21.S[3], V16.S[0] ; +0x1d4, 0x100c7c\nINS V22.S[3], V31.S[0] ; +0x1d8, 0x100c80\nINS V23.S[3], V6.S[0] ; +0x1dc, 0x100c84\nLSR W8, W21, #1 ; +0x1e0, 0x100c88\nCBZ W6, loc_100D60 ; +0x1e4, 0x100c8c\nCBZ W8, loc_100CC8 ; +0x1e8, 0x100c90\nLDR Q24, [X20],#0x10 ; +0x1ec, 0x100c94\nSUB W8, W8, #1 ; +0x1f0, 0x100c98\nTRN1 V25.4S, V24.4S, V24.4S ; +0x1f4, 0x100c9c\nTRN2 V26.4S, V24.4S, V24.4S ; +0x1f8, 0x100ca0\nFMUL V27.4S, V18.4S, V24.S[0] ; +0x1fc, 0x100ca4\nFMUL V28.4S, V20.4S, V24.S[2] ; +0x200, 0x100ca8\nFMUL V25.4S, V25.4S, V19.4S ; +0x204, 0x100cac\nFMLA V27.4S, V21.4S, V24.S[1] ; +0x208, 0x100cb0\nFMLA V28.4S, V23.4S, V24.S[3] ; +0x20c, 0x100cb4\nFMLA V25.4S, V22.4S, V26.4S ; +0x210, 0x100cb8\nSTP Q25, Q28, [X19,#0x10] ; +0x214, 0x100cbc\nSTR Q27, [X19],#0x30 ; +0x218, 0x100cc0\nCBNZ W8, loc_100C94 ; +0x21c, 0x100cc4\nAND W8, W21, #1 ; +0x220, 0x100cc8\nCBZ W8, loc_100DD4 ; +0x224, 0x100ccc\nLDP S18, S19, [X20],#8 ; +0x228, 0x100cd0\nSUB W8, W8, #1 ; +0x22c, 0x100cd4\nFMUL S20, S18, S30 ; +0x230, 0x100cd8\nFMUL S21, S18, S17 ; +0x234, 0x100cdc\nFMUL S22, S18, S0 ; +0x238, 0x100ce0\nFMUL S23, S18, S7 ; +0x23c, 0x100ce4\nFMUL S24, S18, S1 ; +0x240, 0x100ce8\nFMUL S18, S18, S5 ; +0x244, 0x100cec\nFMADD S20, S19, S2, S20 ; +0x248, 0x100cf0\nFMADD S21, S19, S31, S21 ; +0x24c, 0x100cf4\nFMADD S22, S19, S3, S22 ; +0x250, 0x100cf8\nFMADD S23, S19, S16, S23 ; +0x254, 0x100cfc\nFMADD S24, S19, S4, S24 ; +0x258, 0x100d00\nFMADD S18, S19, S6, S18 ; +0x25c, 0x100d04\nSTP S20, S21, [X19] ; +0x260, 0x100d08\nSTP S22, S23, [X19,#8] ; +0x264, 0x100d0c\nSTP S24, S18, [X19,#0x10] ; +0x268, 0x100d10\nADD X19, X19, #0x18 ; +0x26c, 0x100d14\nCBNZ W8, loc_100CD0 ; +0x270, 0x100d18\nB loc_100DD4 ; +0x274, 0x100d1c\nLDR Q24, [X20],#0x10 ; +0x278, 0x100d20\nLDP Q25, Q26, [X19] ; +0x27c, 0x100d24\nLDR Q27, [X19,#0x20] ; +0x280, 0x100d28\nSUB W8, W8, #1 ; +0x284, 0x100d2c\nTRN1 V28.4S, V24.4S, V24.4S ; +0x288, 0x100d30\nFMLA V26.4S, V19.4S, V28.4S ; +0x28c, 0x100d34\nFMUL V28.4S, V20.4S, V24.S[2] ; +0x290, 0x100d38\nTRN2 V29.4S, V24.4S, V24.4S ; +0x294, 0x100d3c\nFMLA V25.4S, V18.4S, V24.S[0] ; +0x298, 0x100d40\nFMLA V28.4S, V23.4S, V24.S[3] ; +0x29c, 0x100d44\nFMLA V25.4S, V21.4S, V24.S[1] ; +0x2a0, 0x100d48\nFMLA V26.4S, V22.4S, V29.4S ; +0x2a4, 0x100d4c\nFADD V24.4S, V28.4S, V27.4S ; +0x2a8, 0x100d50\nSTP Q25, Q26, [X19] ; +0x2ac, 0x100d54\nSTR Q24, [X19,#0x20] ; +0x2b0, 0x100d58\nADD X19, X19, #0x30 ; '0' ; +0x2b4, 0x100d5c\nCBNZ W8, loc_100D20 ; +0x2b8, 0x100d60\nAND W8, W21, #1 ; +0x2bc, 0x100d64\nINS V2.S[1], V31.S[0] ; +0x2c0, 0x100d68\nINS V30.S[1], V17.S[0] ; +0x2c4, 0x100d6c\nINS V3.S[1], V16.S[0] ; +0x2c8, 0x100d70\nINS V0.S[1], V7.S[0] ; +0x2cc, 0x100d74\nINS V4.S[1], V6.S[0] ; +0x2d0, 0x100d78\nINS V1.S[1], V5.S[0] ; +0x2d4, 0x100d7c\nCBZ W8, loc_100DD4 ; +0x2d8, 0x100d80\nMOV X9, X20 ; +0x2dc, 0x100d84\nLD1R {V5.2S}, [X9],#4 ; +0x2e0, 0x100d88\nLDP D6, D7, [X19] ; +0x2e4, 0x100d8c\nSUB W8, W8, #1 ; +0x2e8, 0x100d90\nADD X20, X20, #8 ; +0x2ec, 0x100d94\nLDR S16, [X9] ; +0x2f0, 0x100d98\nFMUL V17.2S, V5.2S, V30.2S ; +0x2f4, 0x100d9c\nFMUL V18.2S, V5.2S, V0.2S ; +0x2f8, 0x100da0\nFMUL V5.2S, V5.2S, V1.2S ; +0x2fc, 0x100da4\nFMLA V17.2S, V2.2S, V16.S[0] ; +0x300, 0x100da8\nFMLA V18.2S, V3.2S, V16.S[0] ; +0x304, 0x100dac\nFMLA V5.2S, V4.2S, V16.S[0] ; +0x308, 0x100db0\nLDR D16, [X19,#0x10] ; +0x30c, 0x100db4\nFADD V6.2S, V17.2S, V6.2S ; +0x310, 0x100db8\nFADD V7.2S, V18.2S, V7.2S ; +0x314, 0x100dbc\nSTP D6, D7, [X19] ; +0x318, 0x100dc0\nFADD V5.2S, V5.2S, V16.2S ; +0x31c, 0x100dc4\nSTR D5, [X19,#0x10] ; +0x320, 0x100dc8\nADD X19, X19, #0x18 ; +0x324, 0x100dcc\nCBNZ W8, loc_100D84 ; +0x328, 0x100dd0\nLDP X29, X30, [SP,#0x50+var_s0] ; +0x32c, 0x100dd4\nLDP X20, X19, [SP,#0x50+var_10] ; +0x330, 0x100dd8\nLDR X21, [SP,#0x50+var_18] ; +0x334, 0x100ddc\nLDR D8, [SP,#0x50+var_20] ; +0x338, 0x100de0\nADD SP, SP, #0x60 ; '`' ; +0x33c, 0x100de4\nRET ; +0x340, 0x100de8", "xrefs": [" @ 0x118b10"], "is_objc": false, "is_arm32": false, "is_arm64": false, "bida_info": "8.0.0 @ https://github.com/Stazzical/BromaIDA", "bindings_info": "commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings"}