{"type": "func", "start": 1052140, "end": 1052800, "name": "sub_100DEC", "pseudocode": "// \n// sub_100DEC from 0x100dec to 0x101080 (660 bytes)\n// \n// 1 xrefs:\n// > <???> @ 0x118b18\n// \n// This function is hookable on this platform!\n// \n// Using BromaIDA 8.0.0 @ https://github.com/Stazzical/BromaIDA\n// Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings\n// \n\nfloat __fastcall sub_100DEC(float *a1, float *s, unsigned int a3, float32x4_t *a4, __int64 a5, __int64 a6, int a7)\n{\n  float32x4_t v7; // q24\n  float32x4_t v8; // q25\n  float32x4_t v9; // q26\n  float32x4_t v10; // q27\n  float32x4_t v11; // q28\n  float32x4_t v12; // q29\n  float *v15; // x20\n  float32x4_t v17; // q0\n  unsigned int v18; // w8\n  float32x4_t *v19; // x9\n  float32x4_t *i; // x10\n  float32x4_t v21; // q3\n  float32x4_t v22; // q4\n  int8x16_t v23; // q5\n  int8x16_t v24; // q6\n  int8x16_t v25; // q7\n  int8x16_t v26; // q16\n  int32x4_t v27; // q23\n  int8x16_t v28; // q17\n  int8x16_t v29; // q4\n  int32x4_t v30; // q6\n  int8x16_t v31; // q18\n  int8x16_t v32; // q19\n  float32x4_t v33; // q16\n  float32x4_t v34; // q6\n  int32x4_t v35; // q23\n  int8x16_t v36; // q20\n  int8x16_t v37; // q21\n  int32x4_t v38; // q4\n  int8x16_t v39; // q22\n  int8x16_t v40; // q3\n  float32x4_t v41; // q19\n  float32x4_t v42; // q4\n  int32x4_t v43; // q23\n  int32x4_t v44; // q21\n  float32x4_t v45; // q1\n  float32x4_t v46; // q2\n  int v47; // w8\n  float v48; // s1\n  float v49; // s4\n  float v50; // s5\n  float v51; // s3\n  float v52; // s6\n  float v53; // s2\n  float v54; // s0\n  float v55; // s7\n  float v56; // s1\n  float v57; // s3\n  float v58; // s4\n  float32x4_t v60; // [xsp+0h] [xbp-80h]\n  float32x4_t v61; // [xsp+10h] [xbp-70h]\n  float32x4_t v62; // [xsp+20h] [xbp-60h]\n  float32x4_t v63; // [xsp+30h] [xbp-50h]\n  float32x4_t v64; // [xsp+40h] [xbp-40h]\n  float32x4_t v65; // [xsp+50h] [xbp-30h]\n\n  v7 = *a4;\n  v8 = a4[8];\n  v9 = a4[16];\n  v10 = a4[24];\n  v11 = a4[32];\n  v12 = a4[40];\n  v15 = s;\n  if ( a7 )\n  {\n    v65 = *a4;\n    v63 = a4[16];\n    v64 = a4[8];\n    v61 = a4[32];\n    v62 = a4[24];\n    v60 = a4[40];\n    memset(s, 0, 24LL * a3);\n    v12 = v60;\n    v11 = v61;\n    v10 = v62;\n    v9 = v63;\n    v8 = v64;\n    v7 = v65;\n  }\n  v18 = a3 >> 1;\n  v19 = (float32x4_t *)v15;\n  for ( i = (float32x4_t *)a1; v18; v19 += 3 )\n  {\n    v22 = *i;\n    v21 = i[1];\n    i += 2;\n    --v18;\n    v23 = vmulq_f32(v22, v7);\n    v24 = vmulq_f32(v22, v8);\n    v25 = vmulq_f32(v22, v9);\n    v26 = vmulq_f32(v22, v10);\n    v27 = vextq_s8(v23, vextq_s8(v24, v23, 8u), 8u);\n    v23.n128_u64[1] = v24.n128_u64[0];\n    v28 = vmulq_f32(v22, v11);\n    v29 = vmulq_f32(v22, v12);\n    v30 = vextq_s8(v25, vextq_s8(v26, v25, 8u), 8u);\n    v31 = vmulq_f32(v21, v7);\n    v32 = vmulq_f32(v21, v8);\n    v25.n128_u64[1] = v26.n128_u64[0];\n    v33 = vuzp1q_s32(v27, v30);\n    v34 = vuzp2q_s32(v27, v30);\n    v35 = vextq_s8(v28, vextq_s8(v29, v28, 8u), 8u);\n    v28.n128_u64[1] = v29.n128_u64[0];\n    v36 = vmulq_f32(v21, v9);\n    v37 = vmulq_f32(v21, v10);\n    v38 = vextq_s8(v31, vextq_s8(v32, v31, 8u), 8u);\n    v39 = vmulq_f32(v21, v11);\n    v40 = vmulq_f32(v21, v12);\n    v31.n128_u64[1] = v32.n128_u64[0];\n    v41 = vuzp1q_s32(v35, v38);\n    v42 = vuzp2q_s32(v35, v38);\n    v43 = vextq_s8(v36, vextq_s8(v37, v36, 8u), 8u);\n    v36.n128_u64[1] = v37.n128_u64[0];\n    v44 = vextq_s8(v39, vextq_s8(v40, v39, 8u), 8u);\n    v39.n128_u64[1] = v40.n128_u64[0];\n    v17 = vaddq_f32(vuzp1q_s32(v23, v25), vaddq_f32(vaddq_f32(vaddq_f32(*v19, vuzp2q_s32(v23, v25)), v33), v34));\n    v45 = vaddq_f32(vuzp1q_s32(v28, v31), vaddq_f32(vaddq_f32(vaddq_f32(v19[1], vuzp2q_s32(v28, v31)), v41), v42));\n    v46 = vaddq_f32(\n            vuzp1q_s32(v36, v39),\n            vaddq_f32(vaddq_f32(vaddq_f32(v19[2], vuzp2q_s32(v36, v39)), vuzp1q_s32(v43, v44)), vuzp2q_s32(v43, v44)));\n    *v19 = v17;\n    v19[1] = v45;\n    v19[2] = v46;\n  }\n  v47 = a3 & 1;\n  if ( (a3 & 1) != 0 )\n  {\n    do\n    {\n      v48 = a1[1];\n      v49 = a1[2];\n      v50 = a1[3];\n      v51 = (float)((float)(a4[24].n128_f32[0] * *a1) + (float)(a4[24].n128_f32[1] * v48))\n          + (float)(a4[24].n128_f32[2] * v49);\n      v52 = (float)((float)(a4[32].n128_f32[0] * *a1) + (float)(a4[32].n128_f32[1] * v48))\n          + (float)(a4[32].n128_f32[2] * v49);\n      v53 = (float)((float)((float)(a4->n128_f32[0] * *a1) + (float)(a4->n128_f32[1] * v48))\n                  + (float)(a4->n128_f32[2] * v49))\n          + (float)(a4->n128_f32[3] * v50);\n      v54 = (float)((float)((float)(a4[40].n128_f32[0] * *a1) + (float)(a4[40].n128_f32[1] * v48))\n                  + (float)(a4[40].n128_f32[2] * v49))\n          + (float)(a4[40].n128_f32[3] * v50);\n      v55 = (float)((float)((float)((float)(a4[8].n128_f32[0] * *a1) + (float)(a4[8].n128_f32[1] * v48))\n                          + (float)(a4[8].n128_f32[2] * v49))\n                  + (float)(a4[8].n128_f32[3] * v50))\n          + v15[1];\n      v56 = (float)((float)((float)((float)(a4[16].n128_f32[0] * *a1) + (float)(a4[16].n128_f32[1] * v48))\n                          + (float)(a4[16].n128_f32[2] * v49))\n                  + (float)(a4[16].n128_f32[3] * v50))\n          + v15[2];\n      v57 = (float)(v51 + (float)(a4[24].n128_f32[3] * v50)) + v15[3];\n      --v47;\n      v58 = (float)(v52 + (float)(a4[32].n128_f32[3] * v50)) + v15[4];\n      v17.n128_f32[0] = v54 + v15[5];\n      a1 += 4;\n      *v15 = v53 + *v15;\n      v15[1] = v55;\n      v15[2] = v56;\n      v15[3] = v57;\n      v15[4] = v58;\n      v15[5] = v17.n128_f32[0];\n      v15 += 6;\n    }\n    while ( v47 );\n  }\n  return v17.n128_f32[0];\n}", "assembly": "; \n; sub_100DEC from 0x100dec to 0x101080 (660 bytes)\n; \n; 1 xrefs:\n; > <???> @ 0x118b18\n; \n; This function is hookable on this platform!\n; \n; Using BromaIDA 8.0.0 @ https:;github.com/Stazzical/BromaIDA\n; Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https:;github.com/geode-sdk/bindings\n; \n\nSUB             SP, SP, #0x90                                          ; +0x0, 0x100dec\nLDR             Q24, [X3]                                              ; +0x4, 0x100df0\nLDR             Q25, [X3,#0x80]                                        ; +0x8, 0x100df4\nLDR             Q26, [X3,#0x100]                                       ; +0xc, 0x100df8\nLDR             Q27, [X3,#0x180]                                       ; +0x10, 0x100dfc\nLDR             Q28, [X3,#0x200]                                       ; +0x14, 0x100e00\nLDR             Q29, [X3,#0x280]                                       ; +0x18, 0x100e04\nSTP             X22, X21, [SP,#0x80+var_20]                            ; +0x1c, 0x100e08\nSTP             X20, X19, [SP,#0x80+var_10]                            ; +0x20, 0x100e0c\nMOV             X19, X3                                                ; +0x24, 0x100e10\nMOV             W22, W2                                                ; +0x28, 0x100e14\nMOV             X20, X1                                                ; +0x2c, 0x100e18\nMOV             X21, X0                                                ; +0x30, 0x100e1c\nSTP             X29, X30, [SP,#0x80+var_s0]                            ; +0x34, 0x100e20\nADD             X29, SP, #0x80                                         ; +0x38, 0x100e24\nCBZ             W6, loc_100E64                                         ; +0x3c, 0x100e28\nADD             W8, W22, W22,LSL#1                                     ; +0x40, 0x100e2c\nLSL             W8, W8, #1                                             ; +0x44, 0x100e30\nLSL             X2, X8, #2; n                                          ; +0x48, 0x100e34\nMOV             X0, X20; s                                             ; +0x4c, 0x100e38\nMOV             W1, WZR; c                                             ; +0x50, 0x100e3c\nSTUR            Q24, [X29,#var_30]                                     ; +0x54, 0x100e40\nSTP             Q26, Q25, [SP,#0x80+var_50]                            ; +0x58, 0x100e44\nSTP             Q28, Q27, [SP,#0x80+var_70]                            ; +0x5c, 0x100e48\nSTR             Q29, [SP,#0x80+var_80]                                 ; +0x60, 0x100e4c\nBL              .memset                                                ; +0x64, 0x100e50\nLDP             Q29, Q28, [SP,#0x80+var_80]                            ; +0x68, 0x100e54\nLDP             Q27, Q26, [SP,#0x80+var_60]                            ; +0x6c, 0x100e58\nLDR             Q25, [SP,#0x80+var_40]                                 ; +0x70, 0x100e5c\nLDUR            Q24, [X29,#var_30]                                     ; +0x74, 0x100e60\nLSR             W8, W22, #1                                            ; +0x78, 0x100e64\nMOV             X9, X20                                                ; +0x7c, 0x100e68\nMOV             X10, X21                                               ; +0x80, 0x100e6c\nCBZ             W8, loc_100F6C                                         ; +0x84, 0x100e70\nLDP             Q4, Q3, [X10],#0x20                                    ; +0x88, 0x100e74\nLDP             Q0, Q1, [X9]                                           ; +0x8c, 0x100e78\nLDR             Q2, [X9,#0x20]                                         ; +0x90, 0x100e7c\nSUB             W8, W8, #1                                             ; +0x94, 0x100e80\nFMUL            V5.4S, V4.4S, V24.4S                                   ; +0x98, 0x100e84\nFMUL            V6.4S, V4.4S, V25.4S                                   ; +0x9c, 0x100e88\nFMUL            V7.4S, V4.4S, V26.4S                                   ; +0xa0, 0x100e8c\nFMUL            V16.4S, V4.4S, V27.4S                                  ; +0xa4, 0x100e90\nEXT             V23.16B, V6.16B, V5.16B, #8                            ; +0xa8, 0x100e94\nEXT             V23.16B, V5.16B, V23.16B, #8                           ; +0xac, 0x100e98\nINS             V5.D[1], V6.D[0]                                       ; +0xb0, 0x100e9c\nEXT             V6.16B, V16.16B, V7.16B, #8                            ; +0xb4, 0x100ea0\nFMUL            V17.4S, V4.4S, V28.4S                                  ; +0xb8, 0x100ea4\nFMUL            V4.4S, V4.4S, V29.4S                                   ; +0xbc, 0x100ea8\nEXT             V6.16B, V7.16B, V6.16B, #8                             ; +0xc0, 0x100eac\nFMUL            V18.4S, V3.4S, V24.4S                                  ; +0xc4, 0x100eb0\nFMUL            V19.4S, V3.4S, V25.4S                                  ; +0xc8, 0x100eb4\nINS             V7.D[1], V16.D[0]                                      ; +0xcc, 0x100eb8\nUZP1            V16.4S, V23.4S, V6.4S                                  ; +0xd0, 0x100ebc\nUZP2            V6.4S, V23.4S, V6.4S                                   ; +0xd4, 0x100ec0\nEXT             V23.16B, V4.16B, V17.16B, #8                           ; +0xd8, 0x100ec4\nEXT             V23.16B, V17.16B, V23.16B, #8                          ; +0xdc, 0x100ec8\nINS             V17.D[1], V4.D[0]                                      ; +0xe0, 0x100ecc\nEXT             V4.16B, V19.16B, V18.16B, #8                           ; +0xe4, 0x100ed0\nFMUL            V20.4S, V3.4S, V26.4S                                  ; +0xe8, 0x100ed4\nFMUL            V21.4S, V3.4S, V27.4S                                  ; +0xec, 0x100ed8\nEXT             V4.16B, V18.16B, V4.16B, #8                            ; +0xf0, 0x100edc\nFMUL            V22.4S, V3.4S, V28.4S                                  ; +0xf4, 0x100ee0\nFMUL            V3.4S, V3.4S, V29.4S                                   ; +0xf8, 0x100ee4\nINS             V18.D[1], V19.D[0]                                     ; +0xfc, 0x100ee8\nUZP1            V19.4S, V23.4S, V4.4S                                  ; +0x100, 0x100eec\nUZP2            V4.4S, V23.4S, V4.4S                                   ; +0x104, 0x100ef0\nEXT             V23.16B, V21.16B, V20.16B, #8                          ; +0x108, 0x100ef4\nEXT             V23.16B, V20.16B, V23.16B, #8                          ; +0x10c, 0x100ef8\nINS             V20.D[1], V21.D[0]                                     ; +0x110, 0x100efc\nEXT             V21.16B, V3.16B, V22.16B, #8                           ; +0x114, 0x100f00\nEXT             V21.16B, V22.16B, V21.16B, #8                          ; +0x118, 0x100f04\nINS             V22.D[1], V3.D[0]                                      ; +0x11c, 0x100f08\nUZP1            V3.4S, V23.4S, V21.4S                                  ; +0x120, 0x100f0c\nUZP2            V21.4S, V23.4S, V21.4S                                 ; +0x124, 0x100f10\nUZP1            V23.4S, V5.4S, V7.4S                                   ; +0x128, 0x100f14\nUZP2            V5.4S, V5.4S, V7.4S                                    ; +0x12c, 0x100f18\nUZP1            V7.4S, V17.4S, V18.4S                                  ; +0x130, 0x100f1c\nUZP2            V17.4S, V17.4S, V18.4S                                 ; +0x134, 0x100f20\nUZP1            V18.4S, V20.4S, V22.4S                                 ; +0x138, 0x100f24\nUZP2            V20.4S, V20.4S, V22.4S                                 ; +0x13c, 0x100f28\nFADD            V0.4S, V0.4S, V5.4S                                    ; +0x140, 0x100f2c\nFADD            V1.4S, V1.4S, V17.4S                                   ; +0x144, 0x100f30\nFADD            V2.4S, V2.4S, V20.4S                                   ; +0x148, 0x100f34\nFADD            V0.4S, V0.4S, V16.4S                                   ; +0x14c, 0x100f38\nFADD            V1.4S, V1.4S, V19.4S                                   ; +0x150, 0x100f3c\nFADD            V2.4S, V2.4S, V3.4S                                    ; +0x154, 0x100f40\nFADD            V0.4S, V0.4S, V6.4S                                    ; +0x158, 0x100f44\nFADD            V1.4S, V1.4S, V4.4S                                    ; +0x15c, 0x100f48\nFADD            V2.4S, V2.4S, V21.4S                                   ; +0x160, 0x100f4c\nFADD            V0.4S, V23.4S, V0.4S                                   ; +0x164, 0x100f50\nFADD            V1.4S, V7.4S, V1.4S                                    ; +0x168, 0x100f54\nFADD            V2.4S, V18.4S, V2.4S                                   ; +0x16c, 0x100f58\nSTP             Q0, Q1, [X9]                                           ; +0x170, 0x100f5c\nSTR             Q2, [X9,#0x20]                                         ; +0x174, 0x100f60\nADD             X9, X9, #0x30 ; '0'                                    ; +0x178, 0x100f64\nCBNZ            W8, loc_100E74                                         ; +0x17c, 0x100f68\nAND             W8, W22, #1                                            ; +0x180, 0x100f6c\nCBZ             W8, loc_10106C                                         ; +0x184, 0x100f70\nLDP             S0, S1, [X21]                                          ; +0x188, 0x100f74\nLDP             S2, S3, [X19]                                          ; +0x18c, 0x100f78\nLDP             S16, S17, [X19,#0x80]                                  ; +0x190, 0x100f7c\nLDR             S18, [X19,#0x100]                                      ; +0x194, 0x100f80\nLDR             S19, [X19,#0x180]                                      ; +0x198, 0x100f84\nLDR             S20, [X19,#0x200]                                      ; +0x19c, 0x100f88\nLDR             S21, [X19,#0x280]                                      ; +0x1a0, 0x100f8c\nFMUL            S2, S2, S0                                             ; +0x1a4, 0x100f90\nFMUL            S16, S16, S0                                           ; +0x1a8, 0x100f94\nFMUL            S18, S18, S0                                           ; +0x1ac, 0x100f98\nFMUL            S19, S19, S0                                           ; +0x1b0, 0x100f9c\nFMUL            S20, S20, S0                                           ; +0x1b4, 0x100fa0\nFMUL            S0, S21, S0                                            ; +0x1b8, 0x100fa4\nLDR             S21, [X19,#0x104]                                      ; +0x1bc, 0x100fa8\nFMADD           S2, S3, S1, S2                                         ; +0x1c0, 0x100fac\nLDR             S3, [X19,#0x184]                                       ; +0x1c4, 0x100fb0\nFMADD           S16, S17, S1, S16                                      ; +0x1c8, 0x100fb4\nLDR             S17, [X19,#0x204]                                      ; +0x1cc, 0x100fb8\nLDP             S4, S5, [X21,#8]                                       ; +0x1d0, 0x100fbc\nLDP             S6, S7, [X19,#8]                                       ; +0x1d4, 0x100fc0\nFMADD           S18, S21, S1, S18                                      ; +0x1d8, 0x100fc4\nLDR             S21, [X19,#0x284]                                      ; +0x1dc, 0x100fc8\nFMADD           S3, S3, S1, S19                                        ; +0x1e0, 0x100fcc\nFMADD           S17, S17, S1, S20                                      ; +0x1e4, 0x100fd0\nLDP             S19, S20, [X19,#0x88]                                  ; +0x1e8, 0x100fd4\nFMADD           S0, S21, S1, S0                                        ; +0x1ec, 0x100fd8\nLDR             S1, [X19,#0x108]                                       ; +0x1f0, 0x100fdc\nLDR             S21, [X19,#0x188]                                      ; +0x1f4, 0x100fe0\nFMADD           S2, S6, S4, S2                                         ; +0x1f8, 0x100fe4\nLDR             S6, [X19,#0x208]                                       ; +0x1fc, 0x100fe8\nFMADD           S16, S19, S4, S16                                      ; +0x200, 0x100fec\nLDR             S19, [X19,#0x288]                                      ; +0x204, 0x100ff0\nFMADD           S1, S1, S4, S18                                        ; +0x208, 0x100ff4\nFMADD           S3, S21, S4, S3                                        ; +0x20c, 0x100ff8\nFMADD           S6, S6, S4, S17                                        ; +0x210, 0x100ffc\nFMADD           S0, S19, S4, S0                                        ; +0x214, 0x101000\nLDR             S4, [X19,#0x10C]                                       ; +0x218, 0x101004\nFMADD           S2, S7, S5, S2                                         ; +0x21c, 0x101008\nLDR             S7, [X19,#0x18C]                                       ; +0x220, 0x10100c\nLDR             S17, [X19,#0x20C]                                      ; +0x224, 0x101010\nFMADD           S1, S4, S5, S1                                         ; +0x228, 0x101014\nLDR             S4, [X19,#0x28C]                                       ; +0x22c, 0x101018\nFMADD           S3, S7, S5, S3                                         ; +0x230, 0x10101c\nFMADD           S6, S17, S5, S6                                        ; +0x234, 0x101020\nLDP             S7, S17, [X20]                                         ; +0x238, 0x101024\nFMADD           S16, S20, S5, S16                                      ; +0x23c, 0x101028\nFMADD           S0, S4, S5, S0                                         ; +0x240, 0x10102c\nLDP             S4, S5, [X20,#8]                                       ; +0x244, 0x101030\nFADD            S2, S2, S7                                             ; +0x248, 0x101034\nFADD            S7, S16, S17                                           ; +0x24c, 0x101038\nLDP             S16, S17, [X20,#0x10]                                  ; +0x250, 0x10103c\nFADD            S1, S1, S4                                             ; +0x254, 0x101040\nFADD            S3, S3, S5                                             ; +0x258, 0x101044\nSUB             W8, W8, #1                                             ; +0x25c, 0x101048\nFADD            S4, S6, S16                                            ; +0x260, 0x10104c\nFADD            S0, S0, S17                                            ; +0x264, 0x101050\nADD             X21, X21, #0x10                                        ; +0x268, 0x101054\nSTP             S2, S7, [X20]                                          ; +0x26c, 0x101058\nSTP             S1, S3, [X20,#8]                                       ; +0x270, 0x10105c\nSTP             S4, S0, [X20,#0x10]                                    ; +0x274, 0x101060\nADD             X20, X20, #0x18                                        ; +0x278, 0x101064\nCBNZ            W8, loc_100F74                                         ; +0x27c, 0x101068\nLDP             X29, X30, [SP,#0x80+var_s0]                            ; +0x280, 0x10106c\nLDP             X20, X19, [SP,#0x80+var_10]                            ; +0x284, 0x101070\nLDP             X22, X21, [SP,#0x80+var_20]                            ; +0x288, 0x101074\nADD             SP, SP, #0x90                                          ; +0x28c, 0x101078\nRET                                                                    ; +0x290, 0x10107c", "xrefs": ["<???> @ 0x118b18"], "is_objc": false, "is_arm32": false, "is_arm64": false, "bida_info": "8.0.0 @ https://github.com/Stazzical/BromaIDA", "bindings_info": "commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings"}