{"type": "func", "start": 1056500, "end": 1057492, "name": "sub_101EF4", "pseudocode": "// \n// sub_101EF4 from 0x101ef4 to 0x1022d4 (992 bytes)\n// \n// 1 xrefs:\n// > @ 0x11a0f8\n// \n// This function is hookable on this platform!\n// \n// Using BromaIDA 8.0.0 @ https://github.com/Stazzical/BromaIDA\n// Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings\n// \n\nfloat32x4_t *__fastcall sub_101EF4(\n float32x4_t *result,\n int a2,\n __int64 a3,\n __int64 a4,\n unsigned __int64 *a5,\n double a6,\n double a7,\n double a8,\n long double a9,\n double a10,\n long double a11)\n{\n float v11; // w8\n long double v12; // q0\n float v13; // w9\n float i; // w10\n unsigned int v15; // w11\n _WORD *v16; // x12\n _WORD *v17; // x14\n float v18; // s4\n int v19; // w1\n int v20; // w8\n int64x2_t v21; // q4\n int64x2_t v22; // q2\n float32x4_t v23; // q0\n int64x2_t v24; // q5\n int64x2_t v25; // q2\n int64x2_t v26; // q4\n unsigned __int64 v27; // d7\n int16x8_t *v28; // x10\n __int64 v29; // x9\n int16x8_t v30; // q7\n int16x8_t v31; // q17\n __int128 v32; // q19\n unsigned __int64 v33; // d16\n int32x4_t v34; // q6\n int32x4_t v35; // q20\n int8x16_t v36; // q7\n int8x16_t v37; // q17\n int8x16_t v38; // q21\n int8x16_t v39; // q18\n float32x4_t v40; // q22\n float32x4_t v41; // q21\n float32x4_t v42; // q20\n int16x8_t *v43; // x9\n int16x8_t v44; // q7\n int16x8_t v45; // q16\n int16x4_t *v46; // x9\n int32x4_t v47; // q20\n int8x16_t v48; // q7\n int8x16_t v49; // q16\n int8x16_t v50; // q21\n int8x16_t v51; // q18\n float32x4_t v52; // q22\n float32x4_t v53; // q21\n float32x4_t v54; // q20\n float32x4_t v55; // q21\n float v56; // w9\n long double v57; // q0\n float v58; // w10\n float v59; // w11\n unsigned int v60; // w12\n _WORD *v61; // x13\n _WORD *v62; // x15\n float v63; // s4\n _QWORD *v64; // x4\n int v65; // w8\n\n v11 = 4.6566e-10;\n *(_QWORD *)&v12 = 0x3800000038000000LL;\n *((_QWORD *)&v12 + 1) = 0x3800000038000000LL;\n v13 = 0.000030518;\n for ( i = -0.000030518; a2; *(_QWORD *)a4 += *a5 )\n {\n if ( ((unsigned __int8)result & 0xF) == 0 )\n break;\n v15 = 6 * *(_DWORD *)(a4 + 4);\n v16 = (_WORD *)(a3 + 2LL * v15);\n LOWORD(a11) = *v16;\n v17 = (_WORD *)(a3 + 2LL * (v15 + 6));\n LOWORD(a9) = *v17;\n WORD1(a11) = v16[1];\n WORD2(a11) = *(_WORD *)(a3 + 2LL * (v15 + 2));\n WORD1(a9) = v17[1];\n WORD2(a9) = *(_WORD *)(a3 + 2LL * (v15 + 8));\n WORD3(a11) = *(_WORD *)(a3 + 2LL * (v15 + 3));\n v18 = (float)*(__int16 *)(a3 + 2LL * (v15 + 5)) * i;\n WORD3(a9) = *(_WORD *)(a3 + 2LL * (v15 + 9));\n result = (float32x4_t *)sub_102D58(\n v12,\n v18 + (float)((float)*(__int16 *)(a3 + 2LL * (v15 + 11)) * v13),\n (float)(*(_DWORD *)a4 >> 1) * v11,\n a9,\n v18,\n a11,\n (float)((float)*(__int16 *)(a3 + 2LL * (v15 + 4)) * i)\n + (float)((float)*(__int16 *)(a3 + 2LL * (v15 + 10)) * v13));\n a2 = v19 - 1;\n }\n v20 = a2 >> 2;\n if ( a2 >> 2 )\n {\n v21 = vld1q_dup_f64((const double *)a4);\n v22.n128_u64[0] = 0;\n v23.n128_u64[0] = 0x3000000030000000LL;\n v23.n128_u64[1] = 0x3000000030000000LL;\n v24.n128_u64[0] = 2 * *a5;\n v22.n128_u64[1] = *a5;\n v24.n128_u64[1] = 3 * *a5;\n a9 = COERCE_LONG_DOUBLE(vdupq_n_s64(4 * *a5));\n v25 = vaddq_s64(v21, v22);\n v26 = vaddq_s64(v24, v21);\n *(_QWORD *)&a11 = 0x3800000038000000LL;\n *((_QWORD *)&a11 + 1) = 0x3800000038000000LL;\n do\n {\n v27 = vmul_s32(\n vzip2_s32((int32x2_t)v25.n128_u64[0], (int32x2_t)vextq_s8(v25, v25, 8u).n128_u64[0]),\n (int32x2_t)0x600000006LL).n64_u64[0];\n v28 = (int16x8_t *)(a3 + 2LL * (unsigned int)v27);\n v29 = a3 + 2LL * HIDWORD(v27);\n v30 = *v28;\n v31 = v28[1];\n v32 = *(_OWORD *)(v29 + 16);\n v33 = vmul_s32(\n vzip2_s32((int32x2_t)v26.n128_u64[0], (int32x2_t)vextq_s8(v26, v26, 8u).n128_u64[0]),\n (int32x2_t)0x600000006LL).n64_u64[0];\n v34 = vmulq_f32(vcvtq_f32_u32(vshrq_n_u32(vuzp1q_s32(v25, v26), 1u)), v23);\n LODWORD(v28) = HIDWORD(v33);\n v35 = vmovl_s16((int16x4_t)v30.n128_u64[0]);\n v36 = vcvtq_f32_s32(vmovl_high_s16(v30));\n v37 = vcvtq_f32_s32(vmovl_s16((int16x4_t)v31.n128_u64[0]));\n v38 = vcvtq_f32_s32(vmovl_s16(*(int16x4_t *)v29));\n v39 = vcvtq_f32_s32(vmovl_high_s16(*(int16x8_t *)v29));\n v40 = vextq_s8(v36, v37, 8u);\n v36.n128_u64[1] = v38.n128_u64[0];\n v41 = vextq_s8(v38, v39, 8u);\n v42 = vcvtq_f32_s32(v35);\n v43 = (int16x8_t *)(a3 + 2LL * (unsigned int)v33);\n result[1] = vmulq_f32(\n vmlaq_f32(\n v36,\n vuzp1q_s32(\n vdupq_lane_s32((int32x2_t)v34.n128_u64[0], 0),\n vdupq_lane_s32((int32x2_t)v34.n128_u64[0], 1)),\n vsubq_f32(vextq_s8(v37, vextq_s8(v39, v37, 8u), 8u), v36)),\n *(float32x4_t *)&a11);\n result[2] = vmulq_f32(\n vmlaq_lane_f32(\n v41,\n vsubq_f32(vcvtq_f32_s32(vmovl_s16(*(int16x4_t *)&v32)), v41),\n (float32x2_t)v34.n128_u64[0],\n 1),\n *(float32x4_t *)&a11);\n *result = vmulq_f32(vmlaq_n_f32(v42, vsubq_f32(v40, v42), v34.n128_f32[0]), *(float32x4_t *)&a11);\n v44 = *v43;\n v45 = v43[1];\n v46 = (int16x4_t *)(a3 + 2LL * (unsigned int)v28);\n v47 = vmovl_s16((int16x4_t)v44.n128_u64[0]);\n v48 = vcvtq_f32_s32(vmovl_high_s16(v44));\n v49 = vcvtq_f32_s32(vmovl_s16((int16x4_t)v45.n128_u64[0]));\n v50 = vcvtq_f32_s32(vmovl_s16((int16x4_t)v46->n64_u64[0]));\n v51 = vcvtq_f32_s32(vmovl_high_s16(*(int16x8_t *)v46->n64_u64));\n v52 = vextq_s8(v48, v49, 8u);\n v48.n128_u64[1] = v50.n128_u64[0];\n v53 = vextq_s8(v50, v51, 8u);\n v54 = vcvtq_f32_s32(v47);\n v55 = vmlaq_laneq_f32(v53, vsubq_f32(vcvtq_f32_s32(vmovl_s16(v46[2])), v53), v34, 3);\n --v20;\n v25 = vaddq_s64(v25, *(int64x2_t *)&a9);\n v26 = vaddq_s64(v26, *(int64x2_t *)&a9);\n result[4] = vmulq_f32(\n vmlaq_f32(\n v48,\n vuzp1q_s32(vdupq_laneq_s32(v34, 2), vdupq_laneq_s32(v34, 3)),\n vsubq_f32(vextq_s8(v49, vextq_s8(v51, v49, 8u), 8u), v48)),\n *(float32x4_t *)&a11);\n result[5] = vmulq_f32(v55, *(float32x4_t *)&a11);\n result[3] = vmulq_f32(vmlaq_laneq_f32(v54, vsubq_f32(v52, v54), v34, 2), *(float32x4_t *)&a11);\n result += 6;\n }\n while ( v20 );\n *(_QWORD *)a4 = v25.n128_u64[0];\n }\n v56 = 4.6566e-10;\n *(_QWORD *)&v57 = 0x3800000038000000LL;\n *((_QWORD *)&v57 + 1) = 0x3800000038000000LL;\n v58 = 0.000030518;\n v59 = -0.000030518;\n if ( (a2 & 3) != 0 )\n {\n do\n {\n v60 = 6 * *(_DWORD *)(a4 + 4);\n v61 = (_WORD *)(a3 + 2LL * v60);\n LOWORD(a11) = *v61;\n v62 = (_WORD *)(a3 + 2LL * (v60 + 6));\n LOWORD(a9) = *v62;\n WORD1(a11) = v61[1];\n WORD2(a11) = *(_WORD *)(a3 + 2LL * (v60 + 2));\n WORD1(a9) = v62[1];\n WORD2(a9) = *(_WORD *)(a3 + 2LL * (v60 + 8));\n WORD3(a11) = *(_WORD *)(a3 + 2LL * (v60 + 3));\n v63 = (float)*(__int16 *)(a3 + 2LL * (v60 + 5)) * v59;\n WORD3(a9) = *(_WORD *)(a3 + 2LL * (v60 + 9));\n result = (float32x4_t *)sub_102D58(\n v57,\n v63 + (float)((float)*(__int16 *)(a3 + 2LL * (v60 + 11)) * v58),\n (float)(*(_DWORD *)a4 >> 1) * v56,\n a9,\n v63,\n a11,\n (float)((float)*(__int16 *)(a3 + 2LL * (v60 + 4)) * v59)\n + (float)((float)*(__int16 *)(a3 + 2LL * (v60 + 10)) * v58));\n *(_QWORD *)a4 += *v64;\n }\n while ( v65 != 1 );\n }\n return result;\n}", "assembly": "; \n; sub_101EF4 from 0x101ef4 to 0x1022d4 (992 bytes)\n; \n; 1 xrefs:\n; > @ 0x11a0f8\n; \n; This function is hookable on this platform!\n; \n; Using BromaIDA 8.0.0 @ https:;github.com/Stazzical/BromaIDA\n; Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https:;github.com/geode-sdk/bindings\n; \n\nMOV W8, #0x30000000 ; +0x0, 0x101ef4\nMOVI V0.4S, #0x38,LSL#24 ; '8' ; +0x4, 0x101ef8\nMOV W9, #0x38000000 ; +0x8, 0x101efc\nMOV W10, #0xB8000000 ; +0xc, 0x101f00\nCBZ W1, loc_10200C ; +0x10, 0x101f04\nAND X11, X0, #0xF ; +0x14, 0x101f08\nCBZ X11, loc_10200C ; +0x18, 0x101f0c\nLDP W14, W11, [X3] ; +0x1c, 0x101f10\nFMOV S3, W8 ; +0x20, 0x101f14\nFMOV S1, W9 ; +0x24, 0x101f18\nFMOV S4, W10 ; +0x28, 0x101f1c\nADD W11, W11, W11,LSL#1 ; +0x2c, 0x101f20\nLSL W11, W11, #1 ; +0x30, 0x101f24\nADD X12, X2, W11,UXTW#1 ; +0x34, 0x101f28\nLDRH W13, [X12] ; +0x38, 0x101f2c\nLSR W14, W14, #1 ; +0x3c, 0x101f30\nUCVTF S2, W14 ; +0x40, 0x101f34\nADD W14, W11, #0xA ; +0x44, 0x101f38\nFMOV S5, W13 ; +0x48, 0x101f3c\nADD W13, W11, #5 ; +0x4c, 0x101f40\nLDRSH W13, [X2,W13,UXTW#1] ; +0x50, 0x101f44\nLDRSH W14, [X2,W14,UXTW#1] ; +0x54, 0x101f48\nLDRH W12, [X12,#2] ; +0x58, 0x101f4c\nFMUL S2, S2, S3 ; +0x5c, 0x101f50\nSCVTF S7, W13 ; +0x60, 0x101f54\nADD W13, W11, #0xB ; +0x64, 0x101f58\nLDRSH W13, [X2,W13,UXTW#1] ; +0x68, 0x101f5c\nSCVTF S16, W14 ; +0x6c, 0x101f60\nADD W14, W11, #6 ; +0x70, 0x101f64\nADD X14, X2, W14,UXTW#1 ; +0x74, 0x101f68\nSCVTF S17, W13 ; +0x78, 0x101f6c\nLDRH W13, [X14] ; +0x7c, 0x101f70\nLDRH W14, [X14,#2] ; +0x80, 0x101f74\nINS V5.S[1], W12 ; +0x84, 0x101f78\nADD W12, W11, #2 ; +0x88, 0x101f7c\nFMOV S3, W13 ; +0x8c, 0x101f80\nINS V3.S[1], W14 ; +0x90, 0x101f84\nUMOV W14, V5.S[1] ; +0x94, 0x101f88\nADD W15, W11, #4 ; +0x98, 0x101f8c\nINS V5.H[1], W14 ; +0x9c, 0x101f90\nADD X12, X2, W12,UXTW#1 ; +0xa0, 0x101f94\nLDRSH W15, [X2,W15,UXTW#1] ; +0xa4, 0x101f98\nADD W14, W11, #8 ; +0xa8, 0x101f9c\nLD1 {V5.H}[2], [X12] ; +0xac, 0x101fa0\nUMOV W12, V3.S[1] ; +0xb0, 0x101fa4\nADD X14, X2, W14,UXTW#1 ; +0xb4, 0x101fa8\nINS V3.H[1], W12 ; +0xb8, 0x101fac\nADD W13, W11, #3 ; +0xbc, 0x101fb0\nLD1 {V3.H}[2], [X14] ; +0xc0, 0x101fb4\nADD X13, X2, W13,UXTW#1 ; +0xc4, 0x101fb8\nSCVTF S6, W15 ; +0xc8, 0x101fbc\nADD W11, W11, #9 ; +0xcc, 0x101fc0\nLD1 {V5.H}[3], [X13] ; +0xd0, 0x101fc4\nADD X11, X2, W11,UXTW#1 ; +0xd4, 0x101fc8\nFMUL S18, S6, S1 ; +0xd8, 0x101fcc\nFMUL S6, S6, S4 ; +0xdc, 0x101fd0\nFMUL S4, S7, S4 ; +0xe0, 0x101fd4\nFMUL S19, S7, S1 ; +0xe4, 0x101fd8\nFMADD S6, S16, S1, S6 ; +0xe8, 0x101fdc\nFMADD S1, S17, S1, S4 ; +0xec, 0x101fe0\nLD1 {V3.H}[3], [X11] ; +0xf0, 0x101fe4\nMOV X5, X30 ; +0xf4, 0x101fe8\nBL sub_102D58 ; +0xf8, 0x101fec\nMOV X30, X5 ; +0xfc, 0x101ff0\nLDR X11, [X4] ; +0x100, 0x101ff4\nLDR X12, [X3] ; +0x104, 0x101ff8\nSUB W1, W1, #1 ; +0x108, 0x101ffc\nADD X11, X12, X11 ; +0x10c, 0x102000\nSTR X11, [X3] ; +0x110, 0x102004\nCBNZ W1, loc_101F08 ; +0x114, 0x102008\nASR W8, W1, #2 ; +0x118, 0x10200c\nCBZ W8, loc_1021BC ; +0x11c, 0x102010\nLDR X9, [X4] ; +0x120, 0x102014\nLD1R {V4.2D}, [X3] ; +0x124, 0x102018\nMOVI V2.2D, #0 ; +0x128, 0x10201c\nMOVI V0.4S, #0x30,LSL#24 ; '0' ; +0x12c, 0x102020\nLSL X10, X9, #1 ; +0x130, 0x102024\nADD X11, X9, X9,LSL#1 ; +0x134, 0x102028\nFMOV D5, X10 ; +0x138, 0x10202c\nINS V2.D[1], X9 ; +0x13c, 0x102030\nLSL X9, X9, #2 ; +0x140, 0x102034\nINS V5.D[1], X11 ; +0x144, 0x102038\nMOVI V1.2S, #6 ; +0x148, 0x10203c\nDUP V3.2D, X9 ; +0x14c, 0x102040\nADD V2.2D, V4.2D, V2.2D ; +0x150, 0x102044\nADD V4.2D, V5.2D, V4.2D ; +0x154, 0x102048\nMOVI V5.4S, #0x38,LSL#24 ; '8' ; +0x158, 0x10204c\nCBZ W8, loc_1021B8 ; +0x15c, 0x102050\nEXT V7.16B, V2.16B, V2.16B, #8 ; +0x160, 0x102054\nZIP2 V7.2S, V2.2S, V7.2S ; +0x164, 0x102058\nMUL V7.2S, V7.2S, V1.2S ; +0x168, 0x10205c\nUMOV W9, V7.S[1] ; +0x16c, 0x102060\nFMOV W10, S7 ; +0x170, 0x102064\nUZP1 V6.4S, V2.4S, V4.4S ; +0x174, 0x102068\nADD X10, X2, W10,UXTW#1 ; +0x178, 0x10206c\nADD X9, X2, W9,UXTW#1 ; +0x17c, 0x102070\nEXT V16.16B, V4.16B, V4.16B, #8 ; +0x180, 0x102074\nUSHR V6.4S, V6.4S, #1 ; +0x184, 0x102078\nLDP Q7, Q17, [X10] ; +0x188, 0x10207c\nLDP Q18, Q19, [X9] ; +0x18c, 0x102080\nZIP2 V16.2S, V4.2S, V16.2S ; +0x190, 0x102084\nUCVTF V6.4S, V6.4S ; +0x194, 0x102088\nMUL V16.2S, V16.2S, V1.2S ; +0x198, 0x10208c\nFMUL V6.4S, V6.4S, V0.4S ; +0x19c, 0x102090\nUMOV W10, V16.S[1] ; +0x1a0, 0x102094\nFMOV W9, S16 ; +0x1a4, 0x102098\nDUP V16.4S, V6.S[0] ; +0x1a8, 0x10209c\nDUP V20.4S, V6.S[1] ; +0x1ac, 0x1020a0\nUZP1 V16.4S, V16.4S, V20.4S ; +0x1b0, 0x1020a4\nSSHLL V20.4S, V7.4H, #0 ; +0x1b4, 0x1020a8\nSSHLL2 V7.4S, V7.8H, #0 ; +0x1b8, 0x1020ac\nSSHLL V17.4S, V17.4H, #0 ; +0x1bc, 0x1020b0\nSSHLL V21.4S, V18.4H, #0 ; +0x1c0, 0x1020b4\nSSHLL2 V18.4S, V18.8H, #0 ; +0x1c4, 0x1020b8\nSCVTF V7.4S, V7.4S ; +0x1c8, 0x1020bc\nSCVTF V17.4S, V17.4S ; +0x1cc, 0x1020c0\nSCVTF V21.4S, V21.4S ; +0x1d0, 0x1020c4\nSCVTF V18.4S, V18.4S ; +0x1d4, 0x1020c8\nSSHLL V19.4S, V19.4H, #0 ; +0x1d8, 0x1020cc\nEXT V22.16B, V7.16B, V17.16B, #8 ; +0x1dc, 0x1020d0\nINS V7.D[1], V21.D[0] ; +0x1e0, 0x1020d4\nEXT V21.16B, V21.16B, V18.16B, #8 ; +0x1e4, 0x1020d8\nEXT V18.16B, V18.16B, V17.16B, #8 ; +0x1e8, 0x1020dc\nSCVTF V20.4S, V20.4S ; +0x1ec, 0x1020e0\nSCVTF V19.4S, V19.4S ; +0x1f0, 0x1020e4\nEXT V17.16B, V17.16B, V18.16B, #8 ; +0x1f4, 0x1020e8\nFSUB V22.4S, V22.4S, V20.4S ; +0x1f8, 0x1020ec\nFSUB V18.4S, V19.4S, V21.4S ; +0x1fc, 0x1020f0\nFSUB V17.4S, V17.4S, V7.4S ; +0x200, 0x1020f4\nFMLA V20.4S, V22.4S, V6.S[0] ; +0x204, 0x1020f8\nFMLA V21.4S, V18.4S, V6.S[1] ; +0x208, 0x1020fc\nFMLA V7.4S, V16.4S, V17.4S ; +0x20c, 0x102100\nFMUL V18.4S, V20.4S, V5.4S ; +0x210, 0x102104\nFMUL V16.4S, V21.4S, V5.4S ; +0x214, 0x102108\nFMUL V7.4S, V7.4S, V5.4S ; +0x218, 0x10210c\nADD X9, X2, W9,UXTW#1 ; +0x21c, 0x102110\nSTP Q7, Q16, [X0,#0x10] ; +0x220, 0x102114\nSTR Q18, [X0] ; +0x224, 0x102118\nLDP Q7, Q16, [X9] ; +0x228, 0x10211c\nADD X9, X2, W10,UXTW#1 ; +0x22c, 0x102120\nDUP V17.4S, V6.S[2] ; +0x230, 0x102124\nDUP V18.4S, V6.S[3] ; +0x234, 0x102128\nUZP1 V17.4S, V17.4S, V18.4S ; +0x238, 0x10212c\nLDP Q18, Q19, [X9] ; +0x23c, 0x102130\nSSHLL V20.4S, V7.4H, #0 ; +0x240, 0x102134\nSSHLL2 V7.4S, V7.8H, #0 ; +0x244, 0x102138\nSSHLL V16.4S, V16.4H, #0 ; +0x248, 0x10213c\nSSHLL V21.4S, V18.4H, #0 ; +0x24c, 0x102140\nSSHLL2 V18.4S, V18.8H, #0 ; +0x250, 0x102144\nSCVTF V7.4S, V7.4S ; +0x254, 0x102148\nSCVTF V16.4S, V16.4S ; +0x258, 0x10214c\nSCVTF V21.4S, V21.4S ; +0x25c, 0x102150\nSCVTF V18.4S, V18.4S ; +0x260, 0x102154\nSSHLL V19.4S, V19.4H, #0 ; +0x264, 0x102158\nEXT V22.16B, V7.16B, V16.16B, #8 ; +0x268, 0x10215c\nINS V7.D[1], V21.D[0] ; +0x26c, 0x102160\nEXT V21.16B, V21.16B, V18.16B, #8 ; +0x270, 0x102164\nEXT V18.16B, V18.16B, V16.16B, #8 ; +0x274, 0x102168\nSCVTF V20.4S, V20.4S ; +0x278, 0x10216c\nSCVTF V19.4S, V19.4S ; +0x27c, 0x102170\nEXT V16.16B, V16.16B, V18.16B, #8 ; +0x280, 0x102174\nFSUB V18.4S, V22.4S, V20.4S ; +0x284, 0x102178\nFSUB V19.4S, V19.4S, V21.4S ; +0x288, 0x10217c\nFSUB V16.4S, V16.4S, V7.4S ; +0x28c, 0x102180\nFMLA V20.4S, V18.4S, V6.S[2] ; +0x290, 0x102184\nFMLA V21.4S, V19.4S, V6.S[3] ; +0x294, 0x102188\nFMLA V7.4S, V17.4S, V16.4S ; +0x298, 0x10218c\nFMUL V6.4S, V20.4S, V5.4S ; +0x29c, 0x102190\nFMUL V16.4S, V21.4S, V5.4S ; +0x2a0, 0x102194\nFMUL V7.4S, V7.4S, V5.4S ; +0x2a4, 0x102198\nSUB W8, W8, #1 ; +0x2a8, 0x10219c\nADD V2.2D, V2.2D, V3.2D ; +0x2ac, 0x1021a0\nADD V4.2D, V4.2D, V3.2D ; +0x2b0, 0x1021a4\nSTP Q7, Q16, [X0,#0x40] ; +0x2b4, 0x1021a8\nSTR Q6, [X0,#0x30] ; +0x2b8, 0x1021ac\nADD X0, X0, #0x60 ; '`' ; +0x2bc, 0x1021b0\nCBNZ W8, loc_102054 ; +0x2c0, 0x1021b4\nSTR D2, [X3] ; +0x2c4, 0x1021b8\nAND W8, W1, #3 ; +0x2c8, 0x1021bc\nMOV W9, #0x30000000 ; +0x2cc, 0x1021c0\nMOVI V0.4S, #0x38,LSL#24 ; '8' ; +0x2d0, 0x1021c4\nMOV W10, #0x38000000 ; +0x2d4, 0x1021c8\nMOV W11, #0xB8000000 ; +0x2d8, 0x1021cc\nCBZ W8, locret_1022D0 ; +0x2dc, 0x1021d0\nLDP W15, W12, [X3] ; +0x2e0, 0x1021d4\nFMOV S3, W9 ; +0x2e4, 0x1021d8\nFMOV S1, W10 ; +0x2e8, 0x1021dc\nFMOV S4, W11 ; +0x2ec, 0x1021e0\nADD W12, W12, W12,LSL#1 ; +0x2f0, 0x1021e4\nLSL W12, W12, #1 ; +0x2f4, 0x1021e8\nADD X13, X2, W12,UXTW#1 ; +0x2f8, 0x1021ec\nLDRH W14, [X13] ; +0x2fc, 0x1021f0\nLSR W15, W15, #1 ; +0x300, 0x1021f4\nUCVTF S2, W15 ; +0x304, 0x1021f8\nADD W15, W12, #0xA ; +0x308, 0x1021fc\nFMOV S5, W14 ; +0x30c, 0x102200\nADD W14, W12, #5 ; +0x310, 0x102204\nLDRSH W14, [X2,W14,UXTW#1] ; +0x314, 0x102208\nLDRSH W15, [X2,W15,UXTW#1] ; +0x318, 0x10220c\nLDRH W13, [X13,#2] ; +0x31c, 0x102210\nFMUL S2, S2, S3 ; +0x320, 0x102214\nSCVTF S7, W14 ; +0x324, 0x102218\nADD W14, W12, #0xB ; +0x328, 0x10221c\nLDRSH W14, [X2,W14,UXTW#1] ; +0x32c, 0x102220\nSCVTF S16, W15 ; +0x330, 0x102224\nADD W15, W12, #6 ; +0x334, 0x102228\nADD X15, X2, W15,UXTW#1 ; +0x338, 0x10222c\nSCVTF S17, W14 ; +0x33c, 0x102230\nLDRH W14, [X15] ; +0x340, 0x102234\nLDRH W15, [X15,#2] ; +0x344, 0x102238\nINS V5.S[1], W13 ; +0x348, 0x10223c\nADD W13, W12, #2 ; +0x34c, 0x102240\nFMOV S3, W14 ; +0x350, 0x102244\nINS V3.S[1], W15 ; +0x354, 0x102248\nUMOV W15, V5.S[1] ; +0x358, 0x10224c\nADD W16, W12, #4 ; +0x35c, 0x102250\nINS V5.H[1], W15 ; +0x360, 0x102254\nADD X13, X2, W13,UXTW#1 ; +0x364, 0x102258\nLDRSH W16, [X2,W16,UXTW#1] ; +0x368, 0x10225c\nADD W15, W12, #8 ; +0x36c, 0x102260\nLD1 {V5.H}[2], [X13] ; +0x370, 0x102264\nUMOV W13, V3.S[1] ; +0x374, 0x102268\nADD X15, X2, W15,UXTW#1 ; +0x378, 0x10226c\nINS V3.H[1], W13 ; +0x37c, 0x102270\nADD W14, W12, #3 ; +0x380, 0x102274\nLD1 {V3.H}[2], [X15] ; +0x384, 0x102278\nADD X14, X2, W14,UXTW#1 ; +0x388, 0x10227c\nSCVTF S6, W16 ; +0x38c, 0x102280\nADD W12, W12, #9 ; +0x390, 0x102284\nLD1 {V5.H}[3], [X14] ; +0x394, 0x102288\nADD X12, X2, W12,UXTW#1 ; +0x398, 0x10228c\nFMUL S18, S6, S1 ; +0x39c, 0x102290\nFMUL S6, S6, S4 ; +0x3a0, 0x102294\nFMUL S4, S7, S4 ; +0x3a4, 0x102298\nFMUL S19, S7, S1 ; +0x3a8, 0x10229c\nFMADD S6, S16, S1, S6 ; +0x3ac, 0x1022a0\nFMADD S1, S17, S1, S4 ; +0x3b0, 0x1022a4\nLD1 {V3.H}[3], [X12] ; +0x3b4, 0x1022a8\nMOV X1, X30 ; +0x3b8, 0x1022ac\nBL sub_102D58 ; +0x3bc, 0x1022b0\nMOV X30, X1 ; +0x3c0, 0x1022b4\nLDR X12, [X4] ; +0x3c4, 0x1022b8\nLDR X13, [X3] ; +0x3c8, 0x1022bc\nSUB W8, W8, #1 ; +0x3cc, 0x1022c0\nADD X12, X13, X12 ; +0x3d0, 0x1022c4\nSTR X12, [X3] ; +0x3d4, 0x1022c8\nCBNZ W8, loc_1021D4 ; +0x3d8, 0x1022cc\nRET ; +0x3dc, 0x1022d0", "xrefs": [" @ 0x11a0f8"], "is_objc": false, "is_arm32": false, "is_arm64": false, "bida_info": "8.0.0 @ https://github.com/Stazzical/BromaIDA", "bindings_info": "commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings"}