{"type": "func", "start": 1058916, "end": 1059548, "name": "sub_102864", "pseudocode": "// \n// sub_102864 from 0x102864 to 0x102adc (632 bytes)\n// \n// 1 xrefs:\n// > <???> @ 0x11a120\n// \n// This function is hookable on this platform!\n// \n// Using BromaIDA 8.0.0 @ https://github.com/Stazzical/BromaIDA\n// Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings\n// \n\n__int64 __fastcall sub_102864(__int64 result, int a2, __int64 a3, __int64 a4, unsigned __int64 *a5)\n{\n  float i; // w8\n  __int64 v6; // x9\n  int v7; // w8\n  int64x2_t v8; // q3\n  int64x2_t v9; // q1\n  float32x4_t v10; // q0\n  int64x2_t v11; // q4\n  int64x2_t v12; // q2\n  int64x2_t v13; // q1\n  int64x2_t v14; // q3\n  unsigned __int64 v15; // d6\n  int8x16_t *v16; // x10\n  int8x16_t *v17; // x9\n  float32x4_t v18; // q6\n  int8x16_t v19; // q16\n  int8x16_t v20; // q17\n  int8x16_t v21; // q19\n  unsigned __int64 v22; // d7\n  int32x4_t v23; // q5\n  float32x4_t v24; // q20\n  float32x4_t v25; // q21\n  float32x4_t v26; // q18\n  int8x16_t *v27; // x9\n  float32x4_t v28; // q6\n  int8x16_t v29; // q7\n  int8x16_t v30; // q16\n  int8x16_t *v31; // x9\n  int8x16_t v32; // q19\n  float32x4_t v33; // q21\n  float32x4_t v34; // q18\n  float32x4_t v35; // q18\n  float v36; // w9\n  __int64 v37; // x10\n  __int64 v38; // x0\n  __int64 v39; // x1\n  int v40; // w8\n\n  for ( i = 4.6566e-10; a2; *(_QWORD *)a4 += *a5 )\n  {\n    if ( (result & 0xF) == 0 )\n      break;\n    v6 = (unsigned int)(6 * *(_DWORD *)(a4 + 4));\n    result = sub_102D8C(\n               (float)(*(_DWORD *)a4 >> 1) * i,\n               *(double *)(a3 + 4 * v6),\n               *(float *)(a3 + 4LL * (unsigned int)(v6 + 4)),\n               *(float *)(a3 + 4LL * (unsigned int)(v6 + 5)),\n               *(float *)(a3 + 4LL * (unsigned int)(v6 + 10)),\n               *(float *)(a3 + 4LL * (unsigned int)(v6 + 11)),\n               *(double *)(a3 + 4LL * (unsigned int)(v6 + 6)),\n               *(double *)(a3 + 4LL * (unsigned int)(v6 + 8)));\n  }\n  v7 = a2 >> 2;\n  if ( a2 >> 2 )\n  {\n    v8 = vld1q_dup_f64((const double *)a4);\n    v9.n128_u64[0] = 0;\n    v10.n128_u64[0] = 0x3000000030000000LL;\n    v10.n128_u64[1] = 0x3000000030000000LL;\n    v11.n128_u64[0] = 2 * *a5;\n    v9.n128_u64[1] = *a5;\n    v11.n128_u64[1] = 3 * *a5;\n    v12 = vdupq_n_s64(4 * *a5);\n    v13 = vaddq_s64(v8, v9);\n    v14 = vaddq_s64(v11, v8);\n    do\n    {\n      v15 = vmul_s32(\n              vzip2_s32((int32x2_t)v13.n128_u64[0], (int32x2_t)vextq_s8(v13, v13, 8u).n128_u64[0]),\n              (int32x2_t)0x600000006LL).n64_u64[0];\n      v16 = (int8x16_t *)(a3 + 4LL * (unsigned int)v15);\n      v17 = (int8x16_t *)(a3 + 4LL * HIDWORD(v15));\n      v18 = *v16;\n      v19 = v16[1];\n      v20 = v16[2];\n      v21 = v17[1];\n      v22 = vmul_s32(\n              vzip2_s32((int32x2_t)v14.n128_u64[0], (int32x2_t)vextq_s8(v14, v14, 8u).n128_u64[0]),\n              (int32x2_t)0x600000006LL).n64_u64[0];\n      v23 = vmulq_f32(vcvtq_f32_u32(vshrq_n_u32(vuzp1q_s32(v13, v14), 1u)), v10);\n      v24 = v17[2];\n      LODWORD(v16) = HIDWORD(v22);\n      v25 = vextq_s8(v19, v20, 8u);\n      v19.n128_u64[1] = v17->n128_u64[0];\n      v26 = vextq_s8(*v17, v21, 8u);\n      v27 = (int8x16_t *)(a3 + 4LL * (unsigned int)v22);\n      *(float32x4_t *)(result + 16) = vmlaq_f32(\n                                        v19,\n                                        vuzp1q_s32(\n                                          vdupq_lane_s32((int32x2_t)v23.n128_u64[0], 0),\n                                          vdupq_lane_s32((int32x2_t)v23.n128_u64[0], 1)),\n                                        vsubq_f32(vextq_s8(v20, vextq_s8(v21, v20, 8u), 8u), v19));\n      *(float32x4_t *)(result + 32) = vmlaq_lane_f32(v26, vsubq_f32(v24, v26), (float32x2_t)v23.n128_u64[0], 1);\n      *(float32x4_t *)result = vmlaq_n_f32(v18, vsubq_f32(v25, v18), v23.n128_f32[0]);\n      v28 = *v27;\n      v29 = v27[1];\n      v30 = v27[2];\n      v31 = (int8x16_t *)(a3 + 4LL * (unsigned int)v16);\n      v32 = v31[1];\n      v33 = vextq_s8(v29, v30, 8u);\n      --v7;\n      v29.n128_u64[1] = v31->n128_u64[0];\n      v34 = vextq_s8(*v31, v32, 8u);\n      v35 = vmlaq_laneq_f32(v34, vsubq_f32(v31[2], v34), v23, 3);\n      v13 = vaddq_s64(v13, v12);\n      v14 = vaddq_s64(v14, v12);\n      *(float32x4_t *)(result + 64) = vmlaq_f32(\n                                        v29,\n                                        vuzp1q_s32(vdupq_laneq_s32(v23, 2), vdupq_laneq_s32(v23, 3)),\n                                        vsubq_f32(vextq_s8(v30, vextq_s8(v32, v30, 8u), 8u), v29));\n      *(float32x4_t *)(result + 80) = v35;\n      *(float32x4_t *)(result + 48) = vmlaq_laneq_f32(v28, vsubq_f32(v33, v28), v23, 2);\n      result += 96;\n    }\n    while ( v7 );\n    *(_QWORD *)a4 = v13.n128_u64[0];\n  }\n  v36 = 4.6566e-10;\n  if ( (a2 & 3) != 0 )\n  {\n    do\n    {\n      v37 = (unsigned int)(6 * *(_DWORD *)(a4 + 4));\n      v38 = sub_102D8C(\n              (float)(*(_DWORD *)a4 >> 1) * v36,\n              *(double *)(a3 + 4 * v37),\n              *(float *)(a3 + 4LL * (unsigned int)(v37 + 4)),\n              *(float *)(a3 + 4LL * (unsigned int)(v37 + 5)),\n              *(float *)(a3 + 4LL * (unsigned int)(v37 + 10)),\n              *(float *)(a3 + 4LL * (unsigned int)(v37 + 11)),\n              *(double *)(a3 + 4LL * (unsigned int)(v37 + 6)),\n              *(double *)(a3 + 4LL * (unsigned int)(v37 + 8)));\n      result = sub_102E10(v38, v39);\n    }\n    while ( v40 );\n  }\n  return result;\n}", "assembly": "; \n; sub_102864 from 0x102864 to 0x102adc (632 bytes)\n; \n; 1 xrefs:\n; > <???> @ 0x11a120\n; \n; This function is hookable on this platform!\n; \n; Using BromaIDA 8.0.0 @ https:;github.com/Stazzical/BromaIDA\n; Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https:;github.com/geode-sdk/bindings\n; \n\nMOV             W8, #0x30000000                                        ; +0x0, 0x102864\nCBZ             W1, loc_102900                                         ; +0x4, 0x102868\nAND             X9, X0, #0xF                                           ; +0x8, 0x10286c\nCBZ             X9, loc_102900                                         ; +0xc, 0x102870\nLDP             W9, W10, [X3]                                          ; +0x10, 0x102874\nFMOV            S0, W8                                                 ; +0x14, 0x102878\nSUB             W1, W1, #1                                             ; +0x18, 0x10287c\nLSR             W9, W9, #1                                             ; +0x1c, 0x102880\nADD             W10, W10, W10,LSL#1                                    ; +0x20, 0x102884\nUCVTF           S1, W9                                                 ; +0x24, 0x102888\nLSL             W9, W10, #1                                            ; +0x28, 0x10288c\nLSL             X10, X9, #2                                            ; +0x2c, 0x102890\nFMUL            S0, S1, S0                                             ; +0x30, 0x102894\nLDR             D1, [X2,X10]                                           ; +0x34, 0x102898\nADD             W10, W9, #4                                            ; +0x38, 0x10289c\nLDR             S2, [X2,W10,UXTW#2]                                    ; +0x3c, 0x1028a0\nADD             W10, W9, #5                                            ; +0x40, 0x1028a4\nLDR             S3, [X2,W10,UXTW#2]                                    ; +0x44, 0x1028a8\nADD             W10, W9, #0xA                                          ; +0x48, 0x1028ac\nLDR             S4, [X2,W10,UXTW#2]                                    ; +0x4c, 0x1028b0\nADD             W10, W9, #0xB                                          ; +0x50, 0x1028b4\nLDR             S5, [X2,W10,UXTW#2]                                    ; +0x54, 0x1028b8\nADD             W10, W9, #6                                            ; +0x58, 0x1028bc\nLSL             X10, X10, #2                                           ; +0x5c, 0x1028c0\nLDR             D6, [X2,X10]                                           ; +0x60, 0x1028c4\nADD             W10, W9, #2                                            ; +0x64, 0x1028c8\nADD             W9, W9, #8                                             ; +0x68, 0x1028cc\nLSL             X10, X10, #2                                           ; +0x6c, 0x1028d0\nLSL             X9, X9, #2                                             ; +0x70, 0x1028d4\nLDR             D7, [X2,X9]                                            ; +0x74, 0x1028d8\nLDR             D16, [X2,X10]                                          ; +0x78, 0x1028dc\nMOV             X5, X30                                                ; +0x7c, 0x1028e0\nBL              sub_102D8C                                             ; +0x80, 0x1028e4\nMOV             X30, X5                                                ; +0x84, 0x1028e8\nLDR             X9, [X4]                                               ; +0x88, 0x1028ec\nLDR             X10, [X3]                                              ; +0x8c, 0x1028f0\nADD             X9, X10, X9                                            ; +0x90, 0x1028f4\nSTR             X9, [X3]                                               ; +0x94, 0x1028f8\nCBNZ            W1, loc_10286C                                         ; +0x98, 0x1028fc\nASR             W8, W1, #2                                             ; +0x9c, 0x102900\nCBZ             W8, loc_102A44                                         ; +0xa0, 0x102904\nLDR             X9, [X4]                                               ; +0xa4, 0x102908\nLD1R            {V3.2D}, [X3]                                          ; +0xa8, 0x10290c\nMOVI            V1.2D, #0                                              ; +0xac, 0x102910\nMOVI            V0.4S, #0x30,LSL#24 ; '0'                              ; +0xb0, 0x102914\nLSL             X10, X9, #1                                            ; +0xb4, 0x102918\nADD             X11, X9, X9,LSL#1                                      ; +0xb8, 0x10291c\nFMOV            D4, X10                                                ; +0xbc, 0x102920\nINS             V1.D[1], X9                                            ; +0xc0, 0x102924\nLSL             X9, X9, #2                                             ; +0xc4, 0x102928\nINS             V4.D[1], X11                                           ; +0xc8, 0x10292c\nDUP             V2.2D, X9                                              ; +0xcc, 0x102930\nADD             V1.2D, V3.2D, V1.2D                                    ; +0xd0, 0x102934\nADD             V3.2D, V4.2D, V3.2D                                    ; +0xd4, 0x102938\nMOVI            V4.2S, #6                                              ; +0xd8, 0x10293c\nCBZ             W8, loc_102A40                                         ; +0xdc, 0x102940\nEXT             V6.16B, V1.16B, V1.16B, #8                             ; +0xe0, 0x102944\nZIP2            V6.2S, V1.2S, V6.2S                                    ; +0xe4, 0x102948\nMUL             V6.2S, V6.2S, V4.2S                                    ; +0xe8, 0x10294c\nUMOV            W9, V6.S[1]                                            ; +0xec, 0x102950\nFMOV            W10, S6                                                ; +0xf0, 0x102954\nUZP1            V5.4S, V1.4S, V3.4S                                    ; +0xf4, 0x102958\nADD             X10, X2, W10,UXTW#2                                    ; +0xf8, 0x10295c\nADD             X9, X2, W9,UXTW#2                                      ; +0xfc, 0x102960\nEXT             V7.16B, V3.16B, V3.16B, #8                             ; +0x100, 0x102964\nUSHR            V5.4S, V5.4S, #1                                       ; +0x104, 0x102968\nLDP             Q6, Q16, [X10]                                         ; +0x108, 0x10296c\nLDR             Q17, [X10,#0x20]                                       ; +0x10c, 0x102970\nLDP             Q18, Q19, [X9]                                         ; +0x110, 0x102974\nZIP2            V7.2S, V3.2S, V7.2S                                    ; +0x114, 0x102978\nUCVTF           V5.4S, V5.4S                                           ; +0x118, 0x10297c\nMUL             V7.2S, V7.2S, V4.2S                                    ; +0x11c, 0x102980\nFMUL            V5.4S, V5.4S, V0.4S                                    ; +0x120, 0x102984\nLDR             Q20, [X9,#0x20]                                        ; +0x124, 0x102988\nUMOV            W10, V7.S[1]                                           ; +0x128, 0x10298c\nFMOV            W9, S7                                                 ; +0x12c, 0x102990\nDUP             V7.4S, V5.S[0]                                         ; +0x130, 0x102994\nDUP             V21.4S, V5.S[1]                                        ; +0x134, 0x102998\nUZP1            V7.4S, V7.4S, V21.4S                                   ; +0x138, 0x10299c\nEXT             V21.16B, V16.16B, V17.16B, #8                          ; +0x13c, 0x1029a0\nINS             V16.D[1], V18.D[0]                                     ; +0x140, 0x1029a4\nEXT             V18.16B, V18.16B, V19.16B, #8                          ; +0x144, 0x1029a8\nEXT             V19.16B, V19.16B, V17.16B, #8                          ; +0x148, 0x1029ac\nEXT             V17.16B, V17.16B, V19.16B, #8                          ; +0x14c, 0x1029b0\nFSUB            V21.4S, V21.4S, V6.4S                                  ; +0x150, 0x1029b4\nFSUB            V19.4S, V20.4S, V18.4S                                 ; +0x154, 0x1029b8\nFSUB            V17.4S, V17.4S, V16.4S                                 ; +0x158, 0x1029bc\nFMLA            V6.4S, V21.4S, V5.S[0]                                 ; +0x15c, 0x1029c0\nFMLA            V18.4S, V19.4S, V5.S[1]                                ; +0x160, 0x1029c4\nFMLA            V16.4S, V7.4S, V17.4S                                  ; +0x164, 0x1029c8\nADD             X9, X2, W9,UXTW#2                                      ; +0x168, 0x1029cc\nSTP             Q16, Q18, [X0,#0x10]                                   ; +0x16c, 0x1029d0\nSTR             Q6, [X0]                                               ; +0x170, 0x1029d4\nLDP             Q6, Q7, [X9]                                           ; +0x174, 0x1029d8\nLDR             Q16, [X9,#0x20]                                        ; +0x178, 0x1029dc\nADD             X9, X2, W10,UXTW#2                                     ; +0x17c, 0x1029e0\nDUP             V17.4S, V5.S[2]                                        ; +0x180, 0x1029e4\nDUP             V18.4S, V5.S[3]                                        ; +0x184, 0x1029e8\nUZP1            V17.4S, V17.4S, V18.4S                                 ; +0x188, 0x1029ec\nLDP             Q18, Q19, [X9]                                         ; +0x18c, 0x1029f0\nLDR             Q20, [X9,#0x20]                                        ; +0x190, 0x1029f4\nEXT             V21.16B, V7.16B, V16.16B, #8                           ; +0x194, 0x1029f8\nSUB             W8, W8, #1                                             ; +0x198, 0x1029fc\nINS             V7.D[1], V18.D[0]                                      ; +0x19c, 0x102a00\nEXT             V18.16B, V18.16B, V19.16B, #8                          ; +0x1a0, 0x102a04\nEXT             V19.16B, V19.16B, V16.16B, #8                          ; +0x1a4, 0x102a08\nEXT             V16.16B, V16.16B, V19.16B, #8                          ; +0x1a8, 0x102a0c\nFSUB            V19.4S, V21.4S, V6.4S                                  ; +0x1ac, 0x102a10\nFSUB            V20.4S, V20.4S, V18.4S                                 ; +0x1b0, 0x102a14\nFSUB            V16.4S, V16.4S, V7.4S                                  ; +0x1b4, 0x102a18\nFMLA            V6.4S, V19.4S, V5.S[2]                                 ; +0x1b8, 0x102a1c\nFMLA            V18.4S, V20.4S, V5.S[3]                                ; +0x1bc, 0x102a20\nFMLA            V7.4S, V17.4S, V16.4S                                  ; +0x1c0, 0x102a24\nADD             V1.2D, V1.2D, V2.2D                                    ; +0x1c4, 0x102a28\nADD             V3.2D, V3.2D, V2.2D                                    ; +0x1c8, 0x102a2c\nSTP             Q7, Q18, [X0,#0x40]                                    ; +0x1cc, 0x102a30\nSTR             Q6, [X0,#0x30]                                         ; +0x1d0, 0x102a34\nADD             X0, X0, #0x60 ; '`'                                    ; +0x1d4, 0x102a38\nCBNZ            W8, loc_102944                                         ; +0x1d8, 0x102a3c\nSTR             D1, [X3]                                               ; +0x1dc, 0x102a40\nAND             W8, W1, #3                                             ; +0x1e0, 0x102a44\nMOV             W9, #0x30000000                                        ; +0x1e4, 0x102a48\nCBZ             W8, locret_102AD8                                      ; +0x1e8, 0x102a4c\nLDP             W10, W11, [X3]                                         ; +0x1ec, 0x102a50\nFMOV            S0, W9                                                 ; +0x1f0, 0x102a54\nSUB             W8, W8, #1                                             ; +0x1f4, 0x102a58\nLSR             W10, W10, #1                                           ; +0x1f8, 0x102a5c\nADD             W11, W11, W11,LSL#1                                    ; +0x1fc, 0x102a60\nUCVTF           S1, W10                                                ; +0x200, 0x102a64\nLSL             W10, W11, #1                                           ; +0x204, 0x102a68\nLSL             X11, X10, #2                                           ; +0x208, 0x102a6c\nFMUL            S0, S1, S0                                             ; +0x20c, 0x102a70\nLDR             D1, [X2,X11]                                           ; +0x210, 0x102a74\nADD             W11, W10, #4                                           ; +0x214, 0x102a78\nLDR             S2, [X2,W11,UXTW#2]                                    ; +0x218, 0x102a7c\nADD             W11, W10, #5                                           ; +0x21c, 0x102a80\nLDR             S3, [X2,W11,UXTW#2]                                    ; +0x220, 0x102a84\nADD             W11, W10, #0xA                                         ; +0x224, 0x102a88\nLDR             S4, [X2,W11,UXTW#2]                                    ; +0x228, 0x102a8c\nADD             W11, W10, #0xB                                         ; +0x22c, 0x102a90\nLDR             S5, [X2,W11,UXTW#2]                                    ; +0x230, 0x102a94\nADD             W11, W10, #6                                           ; +0x234, 0x102a98\nLSL             X11, X11, #2                                           ; +0x238, 0x102a9c\nLDR             D6, [X2,X11]                                           ; +0x23c, 0x102aa0\nADD             W11, W10, #2                                           ; +0x240, 0x102aa4\nADD             W10, W10, #8                                           ; +0x244, 0x102aa8\nLSL             X11, X11, #2                                           ; +0x248, 0x102aac\nLSL             X10, X10, #2                                           ; +0x24c, 0x102ab0\nLDR             D7, [X2,X10]                                           ; +0x250, 0x102ab4\nLDR             D16, [X2,X11]                                          ; +0x254, 0x102ab8\nMOV             X1, X30                                                ; +0x258, 0x102abc\nBL              sub_102D8C                                             ; +0x25c, 0x102ac0\nMOV             X30, X1                                                ; +0x260, 0x102ac4\nMOV             X1, X30                                                ; +0x264, 0x102ac8\nBL              sub_102E10                                             ; +0x268, 0x102acc\nMOV             X30, X1                                                ; +0x26c, 0x102ad0\nCBNZ            W8, loc_102A50                                         ; +0x270, 0x102ad4\nRET                                                                    ; +0x274, 0x102ad8", "xrefs": ["<???> @ 0x11a120"], "is_objc": false, "is_arm32": false, "is_arm64": false, "bida_info": "8.0.0 @ https://github.com/Stazzical/BromaIDA", "bindings_info": "commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings"}