{"type": "func", "start": 347568, "end": 351324, "name": "sub_54DB0", "pseudocode": "// \n// sub_54DB0 from 0x54db0 to 0x55c5c (3756 bytes)\n// \n// 2 xrefs:\n// > sub_58380 @ 0x583c8\n// > sub_5B3B0 @ 0x5b4b8\n// \n// This function is hookable on this platform!\n// \n// Using BromaIDA 8.0.0 @ https://github.com/Stazzical/BromaIDA\n// Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings\n// \n\n__int64 __fastcall sub_54DB0(__int64 a1, int a2, char a3)\n{\n  long double v3; // q8\n  long double v4; // q9\n  long double v5; // q11\n  long double v6; // q12\n  __int64 result; // x0\n  long double v11; // q0\n  long double v12; // q2\n  float v13; // s9\n  float *v14; // x22\n  float v15; // s8\n  __int64 v16; // x8\n  float v17; // s0\n  int v18; // w24\n  __int64 v19; // x0\n  __int64 v20; // x0\n  __int64 v21; // x0\n  unsigned int v22; // w8\n  float v23; // s2\n  float v24; // s1\n  float v25; // s3\n  float v26; // s4\n  float v27; // s1\n  float v28; // s1\n  float v29; // s2\n  float v30; // s3\n  float v31; // s4\n  float v32; // s2\n  float v33; // s2\n  float v34; // s4\n  float v35; // s5\n  float v36; // s3\n  float v37; // w8\n  __int64 v38; // x21\n  float v39; // s0\n  __int64 v40; // x20\n  int v41; // w8\n  float32x2_t *v42; // x27\n  float v43; // s1\n  float32x2_t v44; // d3\n  float v45; // s13\n  float v46; // s0\n  __int64 v47; // x0\n  float v48; // s0\n  float v49; // s1\n  __int64 v50; // x9\n  __int64 v51; // x8\n  float *v52; // x9\n  __int64 i; // x10\n  float v54; // s0\n  float v55; // s1\n  float v56; // s14\n  float v57; // s0\n  float v58; // s1\n  float v59; // s1\n  float v60; // s2\n  float v61; // s0\n  float v62; // s1\n  float v63; // s0\n  float v64; // s0\n  int v65; // w8\n  float v67; // s1\n  __int64 v68; // x9\n  float32x2_t v69; // d5\n  float v72; // s6\n  float v73; // s7\n  float v78; // w8\n  __int64 v79; // x8\n  float v80; // s4\n  __int64 v81; // x21\n  float v82; // s2\n  float v83; // s3\n  float v84; // s7\n  float v85; // s0\n  float v86; // s1\n  float v87; // s16\n  float v88; // s6\n  float v89; // s5\n  int v90; // w8\n  char v91; // w26\n  float v92; // s19\n  float v93; // s7\n  float v94; // s20\n  float v95; // s17\n  float v96; // s18\n  float v97; // s16\n  float v98; // s2\n  float v99; // s0\n  float v100; // s0\n  int v101; // w8\n  __int64 v103; // x22\n  int v104; // w8\n  float v105; // s13\n  __int64 v106; // x20\n  _BOOL4 v107; // w27\n  float v108; // s14\n  float v109; // s0\n  float v110; // s0\n  int v111; // w22\n  _DWORD *v112; // x0\n  int v113; // w20\n  int v114; // w8\n  __int64 v115; // x23\n  __int64 v116; // x24\n  __int64 v117; // x21\n  float v118; // s15\n  __int64 v119; // x26\n  __int64 v120; // x21\n  float *v121; // x27\n  __int64 v122; // x8\n  float *v123; // x9\n  __int64 v124; // x10\n  __int64 v125; // x11\n  int v126; // w12\n  bool v127; // zf\n  float v128; // s0\n  float v129; // s0\n  __int64 v131; // x9\n  __int64 v132; // x10\n  __int64 v133; // x13\n  float v134; // s1\n  __int64 *v135; // x12\n  __int64 v136; // x8\n  __int64 v137; // x14\n  float v138; // s2\n  __int64 v139; // x11\n  float v140; // s3\n  bool v141; // cc\n  bool v142; // cc\n  __int64 *v143; // x8\n  __int64 v144; // x9\n  __int64 v145; // x10\n  float v146; // s0\n  float v147; // s1\n  float v148; // s2\n  __int64 v149; // x8\n  float v150; // s0\n  float v151; // s0\n  float v152; // s1\n  __int64 v153; // x21\n  _QWORD *j; // x22\n  int v155; // w9\n  __int64 v156; // x25\n  _DWORD *v157; // x26\n  int v158; // s0\n  __int64 v159; // x8\n  float *v160; // x11\n  _QWORD *k; // x12\n  float *v162; // x13\n  float *v163; // x14\n  __int64 v164; // x15\n  float v165; // t1\n  __int64 v166; // x8\n  float *v167; // x9\n  __int64 v168; // x3\n  __int64 v169; // x0\n  _QWORD *v170; // [xsp+8h] [xbp-DF8h]\n  char v171; // [xsp+18h] [xbp-DE8h]\n  unsigned int v172; // [xsp+1Ch] [xbp-DE4h]\n  float v173; // [xsp+2Ch] [xbp-DD4h]\n  float cosx; // [xsp+30h] [xbp-DD0h] BYREF\n  float sinx; // [xsp+34h] [xbp-DCCh] BYREF\n  _QWORD v176[2]; // [xsp+38h] [xbp-DC8h] BYREF\n  _QWORD v177[192]; // [xsp+48h] [xbp-DB8h] BYREF\n  float v178; // [xsp+648h] [xbp-7B8h] BYREF\n  unsigned __int64 v179; // [xsp+64Ch] [xbp-7B4h]\n  _DWORD v180[289]; // [xsp+7C8h] [xbp-638h]\n  int v181; // [xsp+C4Ch] [xbp-1B4h] BYREF\n  _OWORD v182[8]; // [xsp+C50h] [xbp-1B0h] BYREF\n  _OWORD v183[8]; // [xsp+CD0h] [xbp-130h] BYREF\n  char v184[4]; // [xsp+D50h] [xbp-B0h] BYREF\n  float v185; // [xsp+D54h] [xbp-ACh] BYREF\n  float v186; // [xsp+D58h] [xbp-A8h] BYREF\n  int v187; // [xsp+D5Ch] [xbp-A4h] BYREF\n\n  v187 = 0;\n  result = (*(__int64 (__fastcall **)(__int64, int *))(*(_QWORD *)a1 + 152LL))(a1, &v187);\n  if ( (_DWORD)result )\n    return result;\n  if ( (v187 & 0x40000010) != 0x10 )\n    goto LABEL_51;\n  v13 = *(float *)(a1 + 200);\n  v14 = (float *)(a1 + 204);\n  v15 = *(float *)(a1 + 204);\n  if ( (*(_BYTE *)(a1 + 72) & 4) != 0\n    || (result = sub_55C5C(*(_QWORD *)(a1 + 8)), (result & 1) != 0)\n    || *(_BYTE *)(*(_QWORD *)(a1 + 8) + 73152LL)\n    || (a3 & 1) != 0 )\n  {\n    v16 = *(_QWORD *)(a1 + 8);\n    if ( *(_QWORD *)(v16 + 73136) )\n    {\n      v17 = *(float *)(a1 + 128);\n      if ( (v187 & 0x40000) != 0 )\n      {\n        v17 = *(float *)(v16 + 68208) + v17;\n        v179 = vadd_f32(*(float32x2_t *)(v16 + 68212), *(float32x2_t *)(a1 + 132)).n64_u64[0];\n      }\n      else\n      {\n        v179 = *(_QWORD *)(a1 + 132);\n      }\n      v178 = v17;\n      if ( (a3 & 1) != 0 )\n      {\n        sub_5CF84(v16 + 73144, v16 + 68208, &v178, a1 + 200, a1 + 204);\n        v18 = 1;\n        goto LABEL_18;\n      }\n      v19 = ((__int64 (*)(void))sub_579C8)();\n      result = sub_5D078(v19);\n    }\n  }\n  v18 = 0;\n  if ( (a3 & 1) == 0 )\n  {\n    v20 = sub_579C8(result);\n    v21 = sub_5D1CC(v20);\n    if ( v21 )\n    {\n      if ( *(_QWORD *)(v21 + 32) == *(_QWORD *)(a1 + 80) )\n      {\n        v18 = 1;\n        *(_QWORD *)(a1 + 200) = *(_QWORD *)(v21 + 52);\n      }\n    }\n  }\nLABEL_18:\n  if ( *(_QWORD *)(a1 + 368) )\n  {\n    if ( v18 )\n    {\n      result = sub_55C9C(a1, *(_QWORD *)(a1 + 80), 0, 3, a1 + 200, a1 + 204);\n      if ( (_DWORD)result )\n        return result;\n    }\n  }\n  LODWORD(v11) = *(_DWORD *)(a1 + 200);\n  v22 = *(_DWORD *)(*(_QWORD *)(a1 + 8) + 69708LL);\n  v23 = (float)v22;\n  if ( !v22 )\n    v23 = 500.0;\n  if ( v13 != *(float *)&v11 )\n  {\n    v24 = (float)(*(float *)&v11 - *(float *)(a1 + 192)) / v23;\n    v25 = fminf(v24, -0.0001);\n    v26 = fmaxf(v24, 0.0001);\n    if ( v24 >= 0.0 )\n      v27 = v26;\n    else\n      v27 = v25;\n    *(float *)(a1 + 216) = v27;\n  }\n  v28 = *v14;\n  if ( v15 != *v14 )\n  {\n    v29 = (float)(v28 - *(float *)(a1 + 196)) / v23;\n    v30 = fminf(v29, -0.0001);\n    v31 = fmaxf(v29, 0.0001);\n    if ( v29 >= 0.0 )\n      v32 = v31;\n    else\n      v32 = v30;\n    *(float *)(a1 + 220) = v32;\n  }\n  v33 = *(float *)(a1 + 192);\n  if ( (v33 != *(float *)&v11 || *(float *)(a1 + 196) != v28) && (a2 || (a3 & 1) != 0) )\n  {\n    if ( (a3 & 1) != 0 )\n    {\n      *(_DWORD *)(a1 + 192) = LODWORD(v11);\n      *(float *)(a1 + 196) = v28;\nLABEL_50:\n      (*(void (__fastcall **)(__int64, _QWORD, long double))(*(_QWORD *)a1 + 408LL))(a1, 0, v11);\n      goto LABEL_51;\n    }\n    v35 = *(float *)(a1 + 216);\n    v34 = *(float *)(a1 + 220);\n    *(float *)&v12 = v33 + (float)(v35 * (float)a2);\n    v36 = *(float *)(a1 + 196) + (float)(v34 * (float)a2);\n    *(_DWORD *)(a1 + 192) = LODWORD(v12);\n    *(float *)(a1 + 196) = v36;\n    if ( v35 <= 0.0 )\n    {\n      if ( *(float *)&v12 >= *(float *)&v11 )\n        goto LABEL_44;\n    }\n    else if ( *(float *)&v12 <= *(float *)&v11 )\n    {\nLABEL_44:\n      if ( v34 <= 0.0 )\n      {\n        if ( v36 >= v28 )\n          goto LABEL_49;\n      }\n      else if ( v36 <= v28 )\n      {\n        goto LABEL_49;\n      }\n      *(float *)(a1 + 196) = v28;\nLABEL_49:\n      v11 = v12;\n      goto LABEL_50;\n    }\n    v12 = v11;\n    *(_DWORD *)(a1 + 192) = LODWORD(v11);\n    goto LABEL_44;\n  }\nLABEL_51:\n  result = sub_6D7C4(*(_QWORD *)(a1 + 8), &v186, &v185, v184);\n  if ( (_DWORD)result )\n    return result;\n  v186 = v186 * *(float *)(a1 + 244);\n  if ( (*(_BYTE *)(a1 + 72) & 4) != 0 || (sub_55C5C(*(_QWORD *)(a1 + 8)) & 1) != 0 )\n  {\n    result = sub_6D6EC(*(_QWORD *)(a1 + 8), &v178);\n    if ( !(_DWORD)result )\n    {\n      v37 = v178;\n      v38 = 0;\n      v39 = 3.4028e38;\n      while ( 1 )\n      {\n        if ( v38 >= SLODWORD(v37) )\n          goto LABEL_115;\n        v40 = *(_QWORD *)(a1 + 8);\n        v41 = v187;\n        v42 = (float32x2_t *)(v40 + 112 * v38 + 68208);\n        if ( (v187 & 0x40000) != 0 )\n        {\n          *(_QWORD *)&v6 = *(_QWORD *)(a1 + 128);\n          v43 = *(float *)(a1 + 136);\n        }\n        else\n        {\n          *(float32x2_t *)&v6 = vsub_f32(*(float32x2_t *)(a1 + 128), (float32x2_t)v42->n64_u64[0]);\n          v43 = *(float *)(a1 + 136) - *(float *)(v40 + 112 * v38 + 68216);\n        }\n        v44.n64_u64[0] = vmul_f32(*(float32x2_t *)&v6, *(float32x2_t *)&v6).n64_u64[0];\n        v45 = (*(_BYTE *)(v40 + 120) & 4) != 0 ? -v43 : v43;\n        *(float *)&v3 = sqrtf(vaddv_f32(v44) + (float)(v45 * v45));\n        if ( *(float *)&v3 < v39 )\n          break;\nLABEL_99:\n        v37 = v178;\n        if ( v186 > 0.0 && LODWORD(v178) == 1 )\n        {\n          if ( (v187 & 0x40000) != 0 )\n          {\n            _D3.n64_u64[0] = *(unsigned __int64 *)(a1 + 144);\n            v69.n64_u64[0] = *(unsigned __int64 *)(a1 + 128);\n            _S4 = *(float *)(a1 + 136);\n          }\n          else\n          {\n            v68 = v40 + 112 * v38;\n            v69.n64_u64[0] = vsub_f32(*(float32x2_t *)(a1 + 128), (float32x2_t)v42->n64_u64[0]).n64_u64[0];\n            _D3.n64_u32[1] = vsub_f32(*(float32x2_t *)(a1 + 144), *(float32x2_t *)(v68 + 68236)).n64_u32[1];\n            _S4 = *(float *)(a1 + 136) - *(float *)(v68 + 68216);\n          }\n          v72 = sqrtf(vaddv_f32(vmul_f32(v69, v69)) + (float)(_S4 * _S4));\n          v73 = 0.0;\n          if ( v72 > 0.0 )\n          {\n            __asm { FMLA            S2, S4, V3.S[1] }\n            v73 = _S2 / v72;\n          }\n          v67 = (float)((float)(v185 * 340.0) - (float)(v73 * v186)) / (float)(v185 * 340.0);\n          *(float *)(a1 + 124) = v67;\n        }\n        else\n        {\n          v67 = *(float *)(a1 + 124);\n        }\n        if ( v67 < 0.000001 )\n          *(_DWORD *)(a1 + 124) = 897988541;\n        ++v38;\n      }\n      *(_DWORD *)(a1 + 152) = LODWORD(v3);\n      if ( *(_QWORD *)(v40 + 69120) )\n      {\n        result = sub_7BA10(v40, 0);\n        if ( (_DWORD)result )\n          return result;\n        v46 = (*(float (__fastcall **)(_QWORD, float))(*(_QWORD *)(a1 + 8) + 69120LL))(\n                *(_QWORD *)(a1 + 80),\n                *(float *)(a1 + 152));\n        v47 = *(_QWORD *)(a1 + 8);\n        *(float *)(a1 + 120) = v46;\n        result = sub_7BAA0(v47);\n        if ( (_DWORD)result )\n          return result;\n      }\n      else\n      {\n        if ( (v41 & 0x4000000) == 0 )\n        {\n          v48 = sub_54D2C(a1, v41 & 0x4F00000, v3);\nLABEL_70:\n          *(float *)(a1 + 120) = v48;\nLABEL_71:\n          v49 = 0.0;\n          if ( v48 >= 0.0 )\n          {\n            v49 = 1.0;\n            if ( v48 <= 1.0 )\n            {\nLABEL_83:\n              v56 = *(float *)(a1 + 172);\n              if ( v56 >= 360.0 && *(float *)(a1 + 168) >= 360.0 )\n                goto LABEL_98;\n              v57 = *(float *)(a1 + 152);\n              v58 = 0.0;\n              if ( v57 > 0.0 )\n              {\n                v59 = *(float *)(a1 + 188);\n                v60 = vaddv_f32(vmul_f32(*(float32x2_t *)(a1 + 180), *(float32x2_t *)&v6));\n                if ( (*(_DWORD *)(*(_QWORD *)(a1 + 8) + 120LL) & 4) != 0 )\n                  v59 = -v59;\n                v61 = (float)(v60 + (float)(v59 * v45)) / v57;\n                v62 = fminf(-v61, 1.0);\n                if ( v61 <= 1.0 )\n                  v63 = v62;\n                else\n                  v63 = -1.0;\n                v58 = acosf(v63) * 114.59;\n              }\n              v64 = *(float *)(a1 + 168);\n              if ( v58 >= v64 )\n              {\n                if ( v58 < v56 )\n                {\n                  *(float *)(a1 + 164) = (float)(1.0 - (float)((float)(v58 - v64) / (float)(v56 - v64)))\n                                       + (float)(*(float *)(a1 + 176) * (float)((float)(v58 - v64) / (float)(v56 - v64)));\nLABEL_98:\n                  v39 = *(float *)&v3;\n                  goto LABEL_99;\n                }\n                v65 = *(_DWORD *)(a1 + 176);\n              }\n              else\n              {\n                v65 = 1065353216;\n              }\n              *(_DWORD *)(a1 + 164) = v65;\n              goto LABEL_98;\n            }\n          }\nLABEL_82:\n          *(float *)(a1 + 120) = v49;\n          goto LABEL_83;\n        }\n        v50 = *(_QWORD *)(a1 + 224);\n        v49 = 1.0;\n        if ( !v50 )\n          goto LABEL_82;\n        v51 = *(int *)(a1 + 232);\n        v49 = 1.0;\n        if ( !(_DWORD)v51 )\n          goto LABEL_82;\n        if ( *(float *)&v3 >= *(float *)(v50 + 12 * (v51 - 1)) )\n        {\n          v78 = *(float *)(v50 + 12 * (v51 - 1) + 4);\n          *(float *)(a1 + 120) = v78;\n          v48 = v78;\n          goto LABEL_71;\n        }\n        v52 = (float *)(v50 + 16);\n        for ( i = 1; i < v51; ++i )\n        {\n          v54 = *(v52 - 4);\n          if ( *(float *)&v3 >= v54 )\n          {\n            v55 = *(v52 - 1);\n            if ( *(float *)&v3 < v55 )\n            {\n              v48 = (float)(*(v52 - 3) - (float)((float)((float)(*(float *)&v3 - v54) / (float)(v55 - v54)) * *(v52 - 3)))\n                  + (float)(*v52 * (float)((float)(*(float *)&v3 - v54) / (float)(v55 - v54)));\n              goto LABEL_70;\n            }\n          }\n          v52 += 3;\n        }\n      }\n      v48 = *(float *)(a1 + 120);\n      goto LABEL_71;\n    }\n  }\n  else\n  {\nLABEL_115:\n    memset(v183, 0, sizeof(v183));\n    memset(v182, 0, sizeof(v182));\n    result = (*(__int64 (__fastcall **)(__int64, int *))(*(_QWORD *)a1 + 504LL))(a1, &v181);\n    if ( (_DWORD)result )\n      return result;\n    v79 = *(_QWORD *)(a1 + 8);\n    v80 = 1.0;\n    v81 = v79 + 68208;\n    if ( *(_DWORD *)(v79 + 69104) == 1 )\n    {\n      v83 = *(float *)(a1 + 128);\n      v82 = *(float *)(a1 + 132);\n      v84 = *(float *)(a1 + 136);\n      if ( (v187 & 0x40000) != 0 )\n      {\n        v85 = 0.0;\n        v87 = 1.0;\n        v86 = 0.0;\n        v89 = 0.0;\n        v90 = *(_DWORD *)(v79 + 120) & 4;\n        if ( v90 )\n          v80 = -1.0;\n        v88 = 0.0;\n      }\n      else\n      {\n        v86 = *(float *)(v79 + 68280);\n        v85 = *(float *)(v79 + 68284);\n        v87 = *(float *)(v79 + 68288);\n        v80 = *(float *)(v79 + 68304);\n        v88 = *(float *)(v79 + 68308);\n        v89 = *(float *)(v79 + 68312);\n        v83 = v83 - *(float *)v81;\n        v82 = v82 - *(float *)(v79 + 68212);\n        v84 = v84 - *(float *)(v79 + 68216);\n        v90 = *(_DWORD *)(v79 + 120) & 4;\n      }\n      v92 = -v84;\n      if ( v90 )\n      {\n        v93 = -v87;\n      }\n      else\n      {\n        v92 = v84;\n        v93 = v87;\n      }\n      v94 = sqrtf((float)((float)(v82 * v82) + (float)(v83 * v83)) + (float)(v92 * v92));\n      v95 = 0.0;\n      v96 = 0.0;\n      v97 = 0.0;\n      if ( v94 > 0.0 )\n      {\n        v97 = v83 * (float)(1.0 / v94);\n        v96 = v82 * (float)(1.0 / v94);\n        v95 = v92 * (float)(1.0 / v94);\n      }\n      v98 = (float)((float)(v95 * v89) + (float)(v96 * v88)) + (float)(v97 * v80);\n      result = 36;\n      if ( v98 > 1.01 )\n        return result;\n      if ( v98 < -1.01 )\n        return result;\n      v99 = (float)((float)(v95 * v93) + (float)(v96 * v85)) + (float)(v97 * v86);\n      result = 36;\n      if ( v99 > 1.01 || v99 < -1.01 )\n        return result;\n      *(float *)&v3 = fmaxf(fminf(v98, 1.0), -1.0);\n      *(float *)&v4 = fmaxf(fminf(v99, 1.0), -1.0);\n      v173 = sub_55D20(36, v3, v4);\n      *(float *)(a1 + 256) = acosf(*(float *)&v4) * 57.296;\n      v100 = *(float *)(a1 + 236);\n      v101 = v181;\n      if ( v100 != 0.0 && v181 == 1 )\n      {\n        v101 = 2;\n        v91 = 1;\n        v181 = 2;\n      }\n      else\n      {\n        v91 = 0;\n      }\n      v103 = v101;\n      v104 = v101 - 1;\n      v105 = v100 * -0.0087266;\n      v106 = 0;\n      v107 = v100 == 0.0 || v104 == 0;\n      v108 = 1.0 / (float)v104;\n      while ( v106 < v103 )\n      {\n        if ( v107 )\n        {\n          *((_DWORD *)v183 + v106) = LODWORD(v3);\n          v109 = *(float *)&v4;\n        }\n        else\n        {\n          switch ( (int)v103 )\n          {\n            case 4:\n              if ( v106 == 1 )\n                v110 = 1.0;\n              else\n                v110 = 0.0;\n              if ( !v106 )\n                v110 = -1.0;\n              break;\n            case 6:\n              v110 = 0.0;\n              if ( (unsigned int)v106 < 6 )\n                v110 = flt_2F15C[v106];\n              break;\n            case 8:\n            case 12:\n              v110 = 0.0;\n              if ( (unsigned int)v106 < 8 )\n                v110 = flt_2F174[v106];\n              break;\n            default:\n              v110 = (float)((float)((float)(int)v106 + (float)(int)v106) * v108) + -1.0;\n              break;\n          }\n          sincosf(v105 * v110, &sinx, &cosx);\n          v109 = (float)(sinx * *(float *)&v3) + (float)(cosx * *(float *)&v4);\n          *((float *)v183 + v106) = -(float)((float)(sinx * *(float *)&v4) - (float)(cosx * *(float *)&v3));\n        }\n        *((float *)v182 + v106++) = v109;\n      }\n    }\n    else\n    {\n      v91 = 0;\n      LODWORD(v3) = 0;\n      LODWORD(v4) = 0;\n      v173 = 0.0;\n    }\n    v111 = *(_DWORD *)(v81 + 2252);\n    if ( (unsigned int)(v111 - 1) >= 2 )\n    {\n      v112 = (_DWORD *)sub_57994(&v178);\n      v171 = v91;\n      v113 = 5;\n      v114 = 2;\n      switch ( v111 )\n      {\n        case 3:\n          goto LABEL_160;\n        case 4:\n        case 5:\n          v114 = v111;\n          goto LABEL_160;\n        case 6:\n          goto LABEL_163;\n        case 7:\n          v111 = 8;\n          v113 = 7;\n          goto LABEL_163;\n        case 8:\n          v111 = 12;\n          v113 = 11;\nLABEL_163:\n          v172 = v111;\n          v115 = a1 + 56;\n          v170 = (_QWORD *)(a1 + 64);\n          if ( *(_QWORD *)(a1 + 64) && *(_BYTE *)(v81 + 2440) )\n          {\n            v117 = 0;\n            v116 = 3;\n            while ( v117 < v181 )\n            {\n              v177[0] = a1 + 56;\n              v177[1] = 3;\n              v112 = (_DWORD *)sub_55D90(v177, (unsigned int)v117);\n              v180[v117++] = *v112;\n            }\n          }\n          else\n          {\n            v116 = 3;\n          }\n          break;\n        default:\n          v114 = 0;\nLABEL_160:\n          v115 = a1 + 56;\n          v116 = 0xFFFFFFFFLL;\n          v113 = v114;\n          v170 = (_QWORD *)(a1 + 64);\n          v172 = v114;\n          break;\n      }\n      v118 = *(float *)(a1 + 240);\n      if ( v118 > 0.0 )\n      {\n        v119 = v181;\n        v120 = 0;\n        v121 = &v178;\n        while ( v120 < v119 )\n        {\n          LODWORD(v5) = *((_DWORD *)v182 + v120);\n          LODWORD(v6) = *((_DWORD *)v183 + v120);\n          if ( *(float *)&v5 != 0.0 || *(float *)&v6 != 0.0 )\n          {\n            v129 = v173;\n            if ( *(float *)&v5 != *(float *)&v4 || *(float *)&v6 != *(float *)&v3 )\n              v129 = sub_55D20(v112, v6, v5);\n            v131 = *(_QWORD *)(a1 + 8);\n            v132 = *(_QWORD *)(v131 + 71040);\n            if ( v132 )\n            {\n              if ( *(_QWORD *)(v131 + 71048) )\n              {\n                v133 = (unsigned int)(v113 + 1) - 1LL;\n                v134 = v129 + 8.0;\n                v135 = (__int64 *)(v131 + 71048);\n                v136 = *(_QWORD *)(v131 + 71040);\n                if ( v113 != 0 )\n                {\n                  while ( v136 )\n                  {\n                    v137 = *v135;\n                    v138 = *(float *)(v136 + 32);\n                    if ( *v135 )\n                      v139 = *v135;\n                    else\n                      v139 = *(_QWORD *)(v131 + 71040);\n                    v140 = *(float *)(v139 + 32);\n                    if ( v138 != v140 )\n                    {\n                      if ( v140 < v138 )\n                        v140 = v140 + 8.0;\n                      v141 = v138 > v129 || v140 <= v129;\n                      if ( !v141 || (v134 >= v138 ? (v142 = v134 < v140) : (v142 = 0), v142) )\n                      {\n                        if ( *(_BYTE *)(v136 + 41) )\n                        {\n                          v146 = -(float)((float)(*(float *)(v139 + 20) * *(float *)&v5)\n                                        - (float)(*(float *)(v139 + 28) * *(float *)&v6));\n                          v147 = -(float)((float)(*(float *)(v136 + 28) * *(float *)&v6)\n                                        - (float)(*(float *)(v136 + 20) * *(float *)&v5));\n                          v148 = *(float *)(v136 + 44) / sqrtf((float)(v146 * v146) + (float)(v147 * v147));\n                          *(&v178 + 32 * (__int64)*(int *)(v136 + 4) + v120) = v148 * v146;\n                          v149 = *(int *)(v139 + 4);\n                          v150 = v148 * v147;\n                        }\n                        else\n                        {\n                          v151 = (float)(*(float *)(v136 + 20) * *(float *)&v6)\n                               + (float)(*(float *)(v136 + 28) * *(float *)&v5);\n                          v152 = sqrtf(2.0 - (float)(v151 * v151));\n                          *(&v178 + 32 * (__int64)*(int *)(v136 + 4) + v120) = (float)(v152 + v151) * 0.5;\n                          v149 = *(int *)(v139 + 4);\n                          v150 = (float)(v152 - v151) * 0.5;\n                        }\n                        *(&v178 + 32 * v149 + v120) = v150;\n                        goto LABEL_217;\n                      }\n                    }\n                    --v133;\n                    ++v135;\n                    v136 = v137;\n                    if ( !v133 )\n                      goto LABEL_217;\n                  }\n                  v143 = (__int64 *)(v131 + 71040);\n                  v144 = (unsigned int)v113;\n                  if ( v113 )\n                  {\n                    do\n                    {\n                      v145 = *v143;\n                      if ( !*v143 )\n                        break;\n                      --v144;\n                      ++v143;\n                      *(&v178 + 32 * (__int64)*(int *)(v145 + 4) + v120) = 1.0;\n                    }\n                    while ( v144 );\n                  }\n                }\n              }\n              else\n              {\n                *(&v178 + 32 * (__int64)*(int *)(v132 + 4) + v120) = 1.0;\n              }\n            }\n          }\n          else\n          {\n            v122 = v116;\n            v123 = v121;\n            v124 = 70504;\n            v125 = v172;\n            if ( v172 )\n            {\n              do\n              {\n                --v125;\n                v126 = *(unsigned __int8 *)(*(_QWORD *)(a1 + 8) + v124);\n                v124 += 48;\n                if ( v126 )\n                  v127 = v122 == 0;\n                else\n                  v127 = 1;\n                if ( v127 )\n                  v128 = 0.0;\n                else\n                  v128 = 1.4142 / (float)v113;\n                *v123 = v128;\n                v123 += 32;\n                --v122;\n              }\n              while ( v125 );\n            }\n          }\nLABEL_217:\n          ++v120;\n          ++v121;\n        }\n      }\n      if ( v118 < 1.0 )\n      {\n        if ( *v170 )\n        {\n          v153 = 0;\n          for ( j = v177; ; j = (_QWORD *)((char *)j + 4) )\n          {\n            v155 = v181;\n            if ( v153 >= v181 )\n              break;\n            v156 = 0;\n            v157 = j;\n            while ( v172 != v156 )\n            {\n              v158 = 0;\n              if ( v116 != v156 )\n              {\n                v176[0] = v115;\n                v176[1] = v156;\n                v158 = *(_DWORD *)sub_55D90(v176, (unsigned int)v153);\n              }\n              *v157 = v158;\n              v157 += 32;\n              ++v156;\n            }\n            ++v153;\n          }\n        }\n        else\n        {\n          sub_57994(v177);\n          sub_AB134(v177, 0, v172, (unsigned int)v181, 1.0);\n          v155 = v181;\n        }\n        v159 = 0;\n        v160 = &v178;\n        for ( k = v177; ; k = (_QWORD *)((char *)k + 4) )\n        {\n          v162 = (float *)k;\n          v163 = v160;\n          v164 = v172;\n          if ( v159 >= v155 )\n            break;\n          if ( v172 )\n          {\n            do\n            {\n              v165 = *v162;\n              v162 += 32;\n              --v164;\n              *v163 = (float)(*v163 * v118) + (float)(v165 * (float)(1.0 - v118));\n              v163 += 32;\n            }\n            while ( v164 );\n          }\n          ++v159;\n          ++v160;\n        }\n      }\n      if ( (v171 & 1) != 0 )\n      {\n        v166 = v172;\n        v181 = 1;\n        v167 = &v178;\n        if ( v172 )\n        {\n          do\n          {\n            --v166;\n            *v167 = (float)(v167[1] + *v167) * 0.5;\n            v167 += 32;\n          }\n          while ( v166 );\n        }\n        v168 = 1;\n      }\n      else\n      {\n        v168 = (unsigned int)v181;\n      }\n      (*(void (__fastcall **)(__int64, float *, _QWORD, __int64, __int64, _QWORD))(*(_QWORD *)a1 + 200LL))(\n        a1,\n        &v178,\n        v172,\n        v168,\n        32,\n        0);\n    }\n    v169 = (*(__int64 (__fastcall **)(__int64, float))(*(_QWORD *)a1 + 72LL))(a1, *(float *)(a1 + 52));\n    sub_5790C(v169);\n    return 0;\n  }\n  return result;\n}", "assembly": "; \n; sub_54DB0 from 0x54db0 to 0x55c5c (3756 bytes)\n; \n; 2 xrefs:\n; > sub_58380 @ 0x583c8\n; > sub_5B3B0 @ 0x5b4b8\n; \n; This function is hookable on this platform!\n; \n; Using BromaIDA 8.0.0 @ https:;github.com/Stazzical/BromaIDA\n; Using bindings at commit ba9f177b at Thu Jul 16 22:52:06 2026 from https:;github.com/geode-sdk/bindings\n; \n\nSTP             D15, D14, [SP,#-0x10+var_90]!                          ; +0x0, 0x54db0\nSTP             D13, D12, [SP,#0x90+var_80]                            ; +0x4, 0x54db4\nSTP             D11, D10, [SP,#0x90+var_70]                            ; +0x8, 0x54db8\nSTP             D9, D8, [SP,#0x90+var_60]                              ; +0xc, 0x54dbc\nSTP             X28, X27, [SP,#0x90+var_50]                            ; +0x10, 0x54dc0\nSTP             X26, X25, [SP,#0x90+var_40]                            ; +0x14, 0x54dc4\nSTP             X24, X23, [SP,#0x90+var_30]                            ; +0x18, 0x54dc8\nSTP             X22, X21, [SP,#0x90+var_20]                            ; +0x1c, 0x54dcc\nSTP             X20, X19, [SP,#0x90+var_10]                            ; +0x20, 0x54dd0\nSTP             X29, X30, [SP,#0x90+var_s0]                            ; +0x24, 0x54dd4\nADD             X29, SP, #0x90                                         ; +0x28, 0x54dd8\nSUB             SP, SP, #0xD70                                         ; +0x2c, 0x54ddc\nSTUR            WZR, [X29,#var_A4]                                     ; +0x30, 0x54de0\nLDR             X8, [X0]                                               ; +0x34, 0x54de4\nMOV             W20, W1                                                ; +0x38, 0x54de8\nSUB             X1, X29, #-var_A4                                      ; +0x3c, 0x54dec\nMOV             W21, W2                                                ; +0x40, 0x54df0\nLDR             X8, [X8,#0x98]                                         ; +0x44, 0x54df4\nMOV             X19, X0                                                ; +0x48, 0x54df8\nBLR             X8                                                     ; +0x4c, 0x54dfc\nCBNZ            W0, loc_55C2C                                          ; +0x50, 0x54e00\nLDUR            W8, [X29,#var_A4]                                      ; +0x54, 0x54e04\nMOV             W9, #0x40000010                                        ; +0x58, 0x54e08\nAND             W8, W8, W9                                             ; +0x60, 0x54e10\nCMP             W8, #0x10                                              ; +0x64, 0x54e14\nB.NE            loc_55090                                              ; +0x68, 0x54e18\nMOV             X23, X19                                               ; +0x6c, 0x54e1c\nLDR             S9, [X23,#0xC8]!                                       ; +0x70, 0x54e20\nMOV             X22, X23                                               ; +0x74, 0x54e24\nLDR             S8, [X22,#4]!                                          ; +0x78, 0x54e28\nLDURB           W8, [X23,#-0x80]                                       ; +0x7c, 0x54e2c\nTBNZ            W8, #2, loc_54E40                                      ; +0x80, 0x54e30\nLDR             X0, [X19,#8]                                           ; +0x84, 0x54e34\nBL              sub_55C5C                                              ; +0x88, 0x54e38\nTBZ             W0, #0, loc_54EE0                                      ; +0x8c, 0x54e3c\nLDR             X8, [X19,#8]                                           ; +0x90, 0x54e40\nMOV             W9, #0x11DB0                                           ; +0x94, 0x54e44\nLDR             X9, [X8,X9]                                            ; +0x9c, 0x54e4c\nCBZ             X9, loc_54EF8                                          ; +0xa0, 0x54e50\nLDURB           W10, [X29,#var_A4+2]                                   ; +0xa4, 0x54e54\nLDR             S0, [X19,#0x80]                                        ; +0xa8, 0x54e58\nADD             X9, SP, #0xE00+var_7B8                                 ; +0xac, 0x54e5c\nTBNZ            W10, #2, loc_54E70                                     ; +0xb0, 0x54e60\nLDUR            X10, [X19,#0x84]                                       ; +0xb4, 0x54e64\nSTUR            X10, [X9,#4]                                           ; +0xb8, 0x54e68\nB               loc_54E94                                              ; +0xbc, 0x54e6c\nMOV             W10, #0x10A70                                          ; +0xc0, 0x54e70\nADD             X10, X8, X10                                           ; +0xc8, 0x54e78\nLDUR            D1, [X19,#0x84]                                        ; +0xcc, 0x54e7c\nLDUR            D3, [X10,#4]                                           ; +0xd0, 0x54e80\nLDR             S2, [X10]                                              ; +0xd4, 0x54e84\nFADD            V1.2S, V3.2S, V1.2S                                    ; +0xd8, 0x54e88\nFADD            S0, S2, S0                                             ; +0xdc, 0x54e8c\nSTUR            D1, [X9,#4]                                            ; +0xe0, 0x54e90\nSTR             S0, [SP,#0xE00+var_7B8]                                ; +0xe4, 0x54e94\nTBZ             W21, #0, loc_54ED0                                     ; +0xe8, 0x54e98\nMOV             W9, #0x1DB8                                            ; +0xec, 0x54e9c\nMOV             W10, #0xA70                                            ; +0xf0, 0x54ea0\nMOVK            W9, #1,LSL#16                                          ; +0xf4, 0x54ea4\nMOVK            W10, #1,LSL#16                                         ; +0xf8, 0x54ea8\nADD             X0, X8, X9                                             ; +0xfc, 0x54eac\nADD             X1, X8, X10                                            ; +0x100, 0x54eb0\nADD             X2, SP, #0xE00+var_7B8                                 ; +0x104, 0x54eb4\nMOV             X3, X23                                                ; +0x108, 0x54eb8\nMOV             X4, X22                                                ; +0x10c, 0x54ebc\nBL              sub_5CF84                                              ; +0x110, 0x54ec0\nMOV             W24, #1                                                ; +0x114, 0x54ec4\nTBZ             W21, #0, loc_54F00                                     ; +0x118, 0x54ec8\nB               loc_54F2C                                              ; +0x11c, 0x54ecc\nBL              sub_579C8                                              ; +0x120, 0x54ed0\nADD             X2, SP, #0xE00+var_7B8                                 ; +0x124, 0x54ed4\nBL              sub_5D078                                              ; +0x128, 0x54ed8\nB               loc_54EF8                                              ; +0x12c, 0x54edc\nLDR             X8, [X19,#8]                                           ; +0x130, 0x54ee0\nMOV             W9, #0x11DC0                                           ; +0x134, 0x54ee4\nLDRB            W8, [X8,X9]                                            ; +0x13c, 0x54eec\nCBNZ            W8, loc_54E40                                          ; +0x140, 0x54ef0\nTBNZ            W21, #0, loc_54E40                                     ; +0x144, 0x54ef4\nMOV             W24, WZR                                               ; +0x148, 0x54ef8\nTBNZ            W21, #0, loc_54F2C                                     ; +0x14c, 0x54efc\nLDR             X8, [X19,#8]                                           ; +0x150, 0x54f00\nBL              sub_579C8                                              ; +0x154, 0x54f04\nBL              sub_5D1CC                                              ; +0x158, 0x54f08\nCBZ             X0, loc_54F2C                                          ; +0x15c, 0x54f0c\nLDR             X8, [X0,#0x20]                                         ; +0x160, 0x54f10\nLDR             X9, [X19,#0x50]                                        ; +0x164, 0x54f14\nCMP             X8, X9                                                 ; +0x168, 0x54f18\nB.NE            loc_54F2C                                              ; +0x16c, 0x54f1c\nLDUR            X8, [X0,#0x34]                                         ; +0x170, 0x54f20\nMOV             W24, #1                                                ; +0x174, 0x54f24\nSTR             X8, [X23]                                              ; +0x178, 0x54f28\nLDR             X8, [X19,#0x170]                                       ; +0x17c, 0x54f2c\nCBZ             X8, loc_54F58                                          ; +0x180, 0x54f30\nCBZ             W24, loc_54F58                                         ; +0x184, 0x54f34\nLDR             X1, [X19,#0x50]                                        ; +0x188, 0x54f38\nMOV             W3, #3                                                 ; +0x18c, 0x54f3c\nMOV             X0, X19                                                ; +0x190, 0x54f40\nMOV             W2, WZR                                                ; +0x194, 0x54f44\nMOV             X4, X23                                                ; +0x198, 0x54f48\nMOV             X5, X22                                                ; +0x19c, 0x54f4c\nBL              sub_55C9C                                              ; +0x1a0, 0x54f50\nCBNZ            W0, loc_55C2C                                          ; +0x1a4, 0x54f54\nLDR             X8, [X19,#8]                                           ; +0x1a8, 0x54f58\nMOV             W9, #0x1104C                                           ; +0x1ac, 0x54f5c\nLDR             S0, [X19,#0xC8]                                        ; +0x1b4, 0x54f64\nLDR             W8, [X8,X9]                                            ; +0x1b8, 0x54f68\nMOV             W9, #0x43FA0000                                        ; +0x1bc, 0x54f6c\nFMOV            S1, W9                                                 ; +0x1c0, 0x54f70\nADRP            X9, #dword_2F098@PAGE                                  ; +0x1c4, 0x54f74\nUCVTF           S2, W8                                                 ; +0x1c8, 0x54f78\nCMP             W8, #0                                                 ; +0x1cc, 0x54f7c\nFCSEL           S2, S1, S2, EQ                                         ; +0x1d0, 0x54f80\nFCMP            S9, S0                                                 ; +0x1d4, 0x54f84\nADRP            X8, #dword_2EEE0@PAGE                                  ; +0x1d8, 0x54f88\nB.EQ            loc_54FB8                                              ; +0x1dc, 0x54f8c\nLDR             S1, [X19,#0xC0]                                        ; +0x1e0, 0x54f90\nLDR             S3, [X9,#dword_2F098@PAGEOFF]                          ; +0x1e4, 0x54f94\nLDR             S4, [X8,#dword_2EEE0@PAGEOFF]                          ; +0x1e8, 0x54f98\nFSUB            S1, S0, S1                                             ; +0x1ec, 0x54f9c\nFDIV            S1, S1, S2                                             ; +0x1f0, 0x54fa0\nFMINNM          S3, S1, S3                                             ; +0x1f4, 0x54fa4\nFMAXNM          S4, S1, S4                                             ; +0x1f8, 0x54fa8\nFCMP            S1, #0.0                                               ; +0x1fc, 0x54fac\nFCSEL           S1, S3, S4, LT                                         ; +0x200, 0x54fb0\nSTR             S1, [X19,#0xD8]                                        ; +0x204, 0x54fb4\nLDR             S1, [X22]                                              ; +0x208, 0x54fb8\nFCMP            S8, S1                                                 ; +0x20c, 0x54fbc\nB.EQ            loc_54FEC                                              ; +0x210, 0x54fc0\nLDR             S3, [X19,#0xC4]                                        ; +0x214, 0x54fc4\nLDR             S4, [X9,#dword_2F098@PAGEOFF]                          ; +0x218, 0x54fc8\nLDR             S5, [X8,#dword_2EEE0@PAGEOFF]                          ; +0x21c, 0x54fcc\nFSUB            S3, S1, S3                                             ; +0x220, 0x54fd0\nFDIV            S2, S3, S2                                             ; +0x224, 0x54fd4\nFMINNM          S3, S2, S4                                             ; +0x228, 0x54fd8\nFMAXNM          S4, S2, S5                                             ; +0x22c, 0x54fdc\nFCMP            S2, #0.0                                               ; +0x230, 0x54fe0\nFCSEL           S2, S3, S4, LT                                         ; +0x234, 0x54fe4\nSTR             S2, [X19,#0xDC]                                        ; +0x238, 0x54fe8\nLDR             S2, [X19,#0xC0]                                        ; +0x23c, 0x54fec\nFCMP            S2, S0                                                 ; +0x240, 0x54ff0\nB.NE            loc_55004                                              ; +0x244, 0x54ff4\nLDR             S3, [X19,#0xC4]                                        ; +0x248, 0x54ff8\nFCMP            S3, S1                                                 ; +0x24c, 0x54ffc\nB.EQ            loc_55090                                              ; +0x250, 0x55000\nCBNZ            W20, loc_5500C                                         ; +0x254, 0x55004\nTBZ             W21, #0, loc_55090                                     ; +0x258, 0x55008\nTBZ             W21, #0, loc_55018                                     ; +0x25c, 0x5500c\nSTP             S0, S1, [X19,#0xC0]                                    ; +0x260, 0x55010\nB               loc_5507C                                              ; +0x264, 0x55014\nLDP             S5, S4, [X19,#0xD8]                                    ; +0x268, 0x55018\nLDR             S3, [X19,#0xC4]                                        ; +0x26c, 0x5501c\nSCVTF           S6, W20                                                ; +0x270, 0x55020\nFMADD           S2, S5, S6, S2                                         ; +0x274, 0x55024\nFMADD           S3, S4, S6, S3                                         ; +0x278, 0x55028\nFCMP            S5, #0.0                                               ; +0x27c, 0x5502c\nSTP             S2, S3, [X19,#0xC0]                                    ; +0x280, 0x55030\nB.LE            loc_55044                                              ; +0x284, 0x55034\nFCMP            S2, S0                                                 ; +0x288, 0x55038\nB.GT            loc_5504C                                              ; +0x28c, 0x5503c\nB               loc_55054                                              ; +0x290, 0x55040\nFCMP            S2, S0                                                 ; +0x294, 0x55044\nB.GE            loc_55054                                              ; +0x298, 0x55048\nMOV             V2.16B, V0.16B                                         ; +0x29c, 0x5504c\nSTR             S0, [X19,#0xC0]                                        ; +0x2a0, 0x55050\nFCMP            S4, #0.0                                               ; +0x2a4, 0x55054\nB.LE            loc_5506C                                              ; +0x2a8, 0x55058\nFCMP            S3, S1                                                 ; +0x2ac, 0x5505c\nB.GT            loc_55074                                              ; +0x2b0, 0x55060\nMOV             V1.16B, V3.16B                                         ; +0x2b4, 0x55064\nB               loc_55078                                              ; +0x2b8, 0x55068\nFCMP            S3, S1                                                 ; +0x2bc, 0x5506c\nB.GE            loc_55064                                              ; +0x2c0, 0x55070\nSTR             S1, [X19,#0xC4]                                        ; +0x2c4, 0x55074\nMOV             V0.16B, V2.16B                                         ; +0x2c8, 0x55078\nLDR             X8, [X19]                                              ; +0x2cc, 0x5507c\nMOV             X0, X19                                                ; +0x2d0, 0x55080\nMOV             W1, WZR                                                ; +0x2d4, 0x55084\nLDR             X8, [X8,#0x198]                                        ; +0x2d8, 0x55088\nBLR             X8                                                     ; +0x2dc, 0x5508c\nLDR             X0, [X19,#8]                                           ; +0x2e0, 0x55090\nSUB             X1, X29, #-var_A8                                      ; +0x2e4, 0x55094\nSUB             X2, X29, #-var_AC                                      ; +0x2e8, 0x55098\nSUB             X3, X29, #-var_B0                                      ; +0x2ec, 0x5509c\nBL              sub_6D7C4                                              ; +0x2f0, 0x550a0\nCBNZ            W0, loc_55C2C                                          ; +0x2f4, 0x550a4\nLDR             S0, [X19,#0xF4]                                        ; +0x2f8, 0x550a8\nLDUR            S1, [X29,#var_A8]                                      ; +0x2fc, 0x550ac\nFMOV            S11, #-1.0                                             ; +0x300, 0x550b0\nFMUL            S0, S1, S0                                             ; +0x304, 0x550b4\nSTUR            S0, [X29,#var_A8]                                      ; +0x308, 0x550b8\nLDRB            W8, [X19,#0x48]                                        ; +0x30c, 0x550bc\nTBNZ            W8, #2, loc_550D0                                      ; +0x310, 0x550c0\nLDR             X0, [X19,#8]                                           ; +0x314, 0x550c4\nBL              sub_55C5C                                              ; +0x318, 0x550c8\nTBZ             W0, #0, loc_55458                                      ; +0x31c, 0x550cc\nLDR             X0, [X19,#8]                                           ; +0x320, 0x550d0\nADD             X1, SP, #0xE00+var_7B8                                 ; +0x324, 0x550d4\nBL              sub_6D6EC                                              ; +0x328, 0x550d8\nCBNZ            W0, loc_55C2C                                          ; +0x32c, 0x550dc\nADRP            X10, #dword_2F008@PAGE                                 ; +0x330, 0x550e0\nLDR             W8, [SP,#0xE00+var_7B8]                                ; +0x334, 0x550e4\nLDR             S10, [X10,#dword_2F008@PAGEOFF]                        ; +0x338, 0x550e8\nMOV             W9, #0x7F7FFFFF                                        ; +0x33c, 0x550ec\nMOV             W23, #0xA70                                            ; +0x340, 0x550f0\nMOV             W24, #0xA78                                            ; +0x344, 0x550f4\nMOV             W25, #0xE00                                            ; +0x348, 0x550f8\nMOV             X21, XZR                                               ; +0x34c, 0x550fc\nMOV             W22, #0x70 ; 'p'                                       ; +0x350, 0x55100\nMOVK            W23, #1,LSL#16                                         ; +0x354, 0x55104\nMOVK            W24, #1,LSL#16                                         ; +0x358, 0x55108\nMOVK            W25, #1,LSL#16                                         ; +0x35c, 0x5510c\nFMOV            S9, #1.0                                               ; +0x360, 0x55110\nMOV             W12, #0xC                                              ; +0x364, 0x55114\nMOV             W28, #0x43B40000                                       ; +0x368, 0x55118\nADRP            X26, #dword_2F05C@PAGE                                 ; +0x36c, 0x5511c\nFMOV            S0, W9                                                 ; +0x370, 0x55120\nCMP             X21, W8,SXTW                                           ; +0x374, 0x55124\nB.GE            loc_55458                                              ; +0x378, 0x55128\nLDR             X20, [X19,#8]                                          ; +0x37c, 0x5512c\nLDUR            W8, [X29,#var_A4]                                      ; +0x380, 0x55130\nNOP                                                                    ; +0x384, 0x55134\nMADD            X9, X21, X22, X20                                      ; +0x388, 0x55138\nADD             X27, X9, X23                                           ; +0x38c, 0x5513c\nTBNZ            W8, #0x12, loc_55164                                   ; +0x390, 0x55140\nMADD            X9, X21, X22, X20                                      ; +0x394, 0x55144\nLDR             D1, [X19,#0x80]                                        ; +0x398, 0x55148\nLDR             D2, [X27]                                              ; +0x39c, 0x5514c\nLDR             S3, [X19,#0x88]                                        ; +0x3a0, 0x55150\nLDR             S4, [X9,X24]                                           ; +0x3a4, 0x55154\nFSUB            V12.2S, V1.2S, V2.2S                                   ; +0x3a8, 0x55158\nFSUB            S1, S3, S4                                             ; +0x3ac, 0x5515c\nB               loc_5516C                                              ; +0x3b0, 0x55160\nLDR             D12, [X19,#0x80]                                       ; +0x3b4, 0x55164\nLDR             S1, [X19,#0x88]                                        ; +0x3b8, 0x55168\nLDRB            W9, [X20,#0x78]                                        ; +0x3bc, 0x5516c\nFNEG            S2, S1                                                 ; +0x3c0, 0x55170\nFMUL            V3.2S, V12.2S, V12.2S                                  ; +0x3c4, 0x55174\nTST             W9, #4                                                 ; +0x3c8, 0x55178\nFCSEL           S13, S1, S2, EQ                                        ; +0x3cc, 0x5517c\nFADDP           S1, V3.2S                                              ; +0x3d0, 0x55180\nFMADD           S1, S13, S13, S1                                       ; +0x3d4, 0x55184\nFSQRT           S8, S1                                                 ; +0x3d8, 0x55188\nFCMP            S8, S0                                                 ; +0x3dc, 0x5518c\nB.GE            loc_55340                                              ; +0x3e0, 0x55190\nSTR             S8, [X19,#0x98]                                        ; +0x3e4, 0x55194\nLDR             X9, [X20,X25]                                          ; +0x3e8, 0x55198\nCBZ             X9, loc_551E0                                          ; +0x3ec, 0x5519c\nMOV             X0, X20                                                ; +0x3f0, 0x551a0\nMOV             W1, WZR                                                ; +0x3f4, 0x551a4\nBL              sub_7BA10                                              ; +0x3f8, 0x551a8\nCBNZ            W0, loc_55C2C                                          ; +0x3fc, 0x551ac\nLDR             X8, [X19,#8]                                           ; +0x400, 0x551b0\nLDR             X0, [X19,#0x50]                                        ; +0x404, 0x551b4\nLDR             S0, [X19,#0x98]                                        ; +0x408, 0x551b8\nLDR             X8, [X8,X25]                                           ; +0x40c, 0x551bc\nBLR             X8                                                     ; +0x410, 0x551c0\nLDR             X0, [X19,#8]                                           ; +0x414, 0x551c4\nSTR             S0, [X19,#0x78]                                        ; +0x418, 0x551c8\nBL              sub_7BAA0                                              ; +0x41c, 0x551cc\nMOV             W12, #0xC                                              ; +0x420, 0x551d0\nCBNZ            W0, loc_55C2C                                          ; +0x424, 0x551d4\nLDR             S0, [X19,#0x78]                                        ; +0x428, 0x551d8\nB               loc_55200                                              ; +0x42c, 0x551dc\nTBNZ            W8, #0x1A, loc_5521C                                   ; +0x430, 0x551e0\nMOV             W9, #0x4F00000                                         ; +0x434, 0x551e4\nAND             W1, W8, W9                                             ; +0x438, 0x551e8\nMOV             X0, X19                                                ; +0x43c, 0x551ec\nMOV             V0.16B, V8.16B                                         ; +0x440, 0x551f0\nBL              sub_54D2C                                              ; +0x444, 0x551f4\nMOV             W12, #0xC                                              ; +0x448, 0x551f8\nSTR             S0, [X19,#0x78]                                        ; +0x44c, 0x551fc\nFCMP            S0, #0.0                                               ; +0x450, 0x55200\nFMOV            S1, WZR                                                ; +0x454, 0x55204\nB.LT            loc_5527C                                              ; +0x458, 0x55208\nFCMP            S0, S9                                                 ; +0x45c, 0x5520c\nMOV             V1.16B, V9.16B                                         ; +0x460, 0x55210\nB.GT            loc_5527C                                              ; +0x464, 0x55214\nB               loc_55280                                              ; +0x468, 0x55218\nLDR             X9, [X19,#0xE0]                                        ; +0x46c, 0x5521c\nMOV             V1.16B, V9.16B                                         ; +0x470, 0x55220\nCBZ             X9, loc_5527C                                          ; +0x474, 0x55224\nLDRSW           X8, [X19,#0xE8]                                        ; +0x478, 0x55228\nMOV             V1.16B, V9.16B                                         ; +0x47c, 0x5522c\nCBZ             W8, loc_5527C                                          ; +0x480, 0x55230\nSUB             X10, X8, #1                                            ; +0x484, 0x55234\nMUL             X11, X10, X12                                          ; +0x488, 0x55238\nLDR             S0, [X9,X11]                                           ; +0x48c, 0x5523c\nFCMP            S8, S0                                                 ; +0x490, 0x55240\nB.GE            loc_55424                                              ; +0x494, 0x55244\nADD             X9, X9, #0x10                                          ; +0x498, 0x55248\nMOV             W10, #1                                                ; +0x49c, 0x5524c\nCMP             X10, X8                                                ; +0x4a0, 0x55250\nB.GE            loc_551D8                                              ; +0x4a4, 0x55254\nLDUR            S0, [X9,#-0x10]                                        ; +0x4a8, 0x55258\nFCMP            S8, S0                                                 ; +0x4ac, 0x5525c\nB.LT            loc_55270                                              ; +0x4b0, 0x55260\nLDUR            S1, [X9,#-4]                                           ; +0x4b4, 0x55264\nFCMP            S8, S1                                                 ; +0x4b8, 0x55268\nB.LT            loc_55438                                              ; +0x4bc, 0x5526c\nADD             X10, X10, #1                                           ; +0x4c0, 0x55270\nADD             X9, X9, #0xC                                           ; +0x4c4, 0x55274\nB               loc_55250                                              ; +0x4c8, 0x55278\nSTR             S1, [X19,#0x78]                                        ; +0x4cc, 0x5527c\nLDR             S14, [X19,#0xAC]                                       ; +0x4d0, 0x55280\nFMOV            S0, W28                                                ; +0x4d4, 0x55284\nFCMP            S14, S0                                                ; +0x4d8, 0x55288\nB.LT            loc_552A0                                              ; +0x4dc, 0x5528c\nLDR             S0, [X19,#0xA8]                                        ; +0x4e0, 0x55290\nFMOV            S1, W28                                                ; +0x4e4, 0x55294\nFCMP            S0, S1                                                 ; +0x4e8, 0x55298\nB.GE            loc_5533C                                              ; +0x4ec, 0x5529c\nLDR             S0, [X19,#0x98]                                        ; +0x4f0, 0x552a0\nFMOV            S1, WZR                                                ; +0x4f4, 0x552a4\nFCMP            S0, #0.0                                               ; +0x4f8, 0x552a8\nB.LE            loc_552F8                                              ; +0x4fc, 0x552ac\nLDR             X8, [X19,#8]                                           ; +0x500, 0x552b0\nLDR             S1, [X19,#0xBC]                                        ; +0x504, 0x552b4\nLDUR            D2, [X19,#0xB4]                                        ; +0x508, 0x552b8\nLDR             W8, [X8,#0x78]                                         ; +0x50c, 0x552bc\nFNEG            S3, S1                                                 ; +0x510, 0x552c0\nFMUL            V2.2S, V2.2S, V12.2S                                   ; +0x514, 0x552c4\nFADDP           S2, V2.2S                                              ; +0x518, 0x552c8\nTST             W8, #4                                                 ; +0x51c, 0x552cc\nFCSEL           S1, S1, S3, EQ                                         ; +0x520, 0x552d0\nFMADD           S1, S1, S13, S2                                        ; +0x524, 0x552d4\nFDIV            S0, S1, S0                                             ; +0x528, 0x552d8\nFNEG            S1, S0                                                 ; +0x52c, 0x552dc\nFMINNM          S1, S1, S9                                             ; +0x530, 0x552e0\nFCMP            S0, S9                                                 ; +0x534, 0x552e4\nFCSEL           S0, S11, S1, GT; x                                     ; +0x538, 0x552e8\nBL              .acosf                                                 ; +0x53c, 0x552ec\nMOV             W12, #0xC                                              ; +0x540, 0x552f0\nFMUL            S1, S0, S10                                            ; +0x544, 0x552f4\nLDR             S0, [X19,#0xA8]                                        ; +0x548, 0x552f8\nFCMP            S1, S0                                                 ; +0x54c, 0x552fc\nB.GE            loc_5530C                                              ; +0x550, 0x55300\nMOV             W8, #0x3F800000                                        ; +0x554, 0x55304\nB               loc_55338                                              ; +0x558, 0x55308\nFCMP            S1, S14                                                ; +0x55c, 0x5530c\nB.GE            loc_55334                                              ; +0x560, 0x55310\nLDR             S2, [X19,#0xB0]                                        ; +0x564, 0x55314\nFSUB            S1, S1, S0                                             ; +0x568, 0x55318\nFSUB            S0, S14, S0                                            ; +0x56c, 0x5531c\nFDIV            S0, S1, S0                                             ; +0x570, 0x55320\nFSUB            S1, S9, S0                                             ; +0x574, 0x55324\nFMADD           S0, S2, S0, S1                                         ; +0x578, 0x55328\nSTR             S0, [X19,#0xA4]                                        ; +0x57c, 0x5532c\nB               loc_5533C                                              ; +0x580, 0x55330\nLDR             W8, [X19,#0xB0]                                        ; +0x584, 0x55334\nSTR             W8, [X19,#0xA4]                                        ; +0x588, 0x55338\nMOV             V0.16B, V8.16B                                         ; +0x58c, 0x5533c\nLDUR            S1, [X29,#var_A8]                                      ; +0x590, 0x55340\nLDR             W8, [SP,#0xE00+var_7B8]                                ; +0x594, 0x55344\nFCMP            S1, #0.0                                               ; +0x598, 0x55348\nCCMP            W8, #1, #0, GT                                         ; +0x59c, 0x5534c\nB.EQ            loc_5535C                                              ; +0x5a0, 0x55350\nLDR             S1, [X19,#0x7C]                                        ; +0x5a4, 0x55354\nB               loc_55404                                              ; +0x5a8, 0x55358\nLDURB           W9, [X29,#var_A4+2]                                    ; +0x5ac, 0x5535c\nLDR             S2, [X19,#0x8C]                                        ; +0x5b0, 0x55360\nTBNZ            W9, #2, loc_553AC                                      ; +0x5b4, 0x55364\nMOV             W10, #0xA88                                            ; +0x5b8, 0x55368\nMADD            X9, X21, X22, X20                                      ; +0x5bc, 0x5536c\nMOVK            W10, #1,LSL#16                                         ; +0x5c0, 0x55370\nLDR             S7, [X9,X10]                                           ; +0x5c4, 0x55374\nMOV             W10, #0x10A8C                                          ; +0x5c8, 0x55378\nLDR             D3, [X19,#0x90]                                        ; +0x5d0, 0x55380\nLDR             D4, [X19,#0x80]                                        ; +0x5d4, 0x55384\nLDR             D5, [X27]                                              ; +0x5d8, 0x55388\nLDR             S6, [X19,#0x88]                                        ; +0x5dc, 0x5538c\nLDR             D16, [X9,X10]                                          ; +0x5e0, 0x55390\nLDR             S17, [X9,X24]                                          ; +0x5e4, 0x55394\nFSUB            V5.2S, V4.2S, V5.2S                                    ; +0x5e8, 0x55398\nFSUB            S2, S2, S7                                             ; +0x5ec, 0x5539c\nFSUB            V3.2S, V3.2S, V16.2S                                   ; +0x5f0, 0x553a0\nFSUB            S4, S6, S17                                            ; +0x5f4, 0x553a4\nB               loc_553B8                                              ; +0x5f8, 0x553a8\nLDR             D3, [X19,#0x90]                                        ; +0x5fc, 0x553ac\nLDR             D5, [X19,#0x80]                                        ; +0x600, 0x553b0\nLDR             S4, [X19,#0x88]                                        ; +0x604, 0x553b4\nFMUL            V6.2S, V5.2S, V5.2S                                    ; +0x608, 0x553b8\nFADDP           S6, V6.2S                                              ; +0x60c, 0x553bc\nFMADD           S6, S4, S4, S6                                         ; +0x610, 0x553c0\nFSQRT           S6, S6                                                 ; +0x614, 0x553c4\nFCMP            S6, #0.0                                               ; +0x618, 0x553c8\nFMOV            S7, WZR                                                ; +0x61c, 0x553cc\nB.LE            loc_553E8                                              ; +0x620, 0x553d0\nFMUL            S2, S2, V5.S[0]                                        ; +0x624, 0x553d4\nDUP             S5, V5.S[1]                                            ; +0x628, 0x553d8\nFMLA            S2, S5, V3.S[0]                                        ; +0x62c, 0x553dc\nFMLA            S2, S4, V3.S[1]                                        ; +0x630, 0x553e0\nFDIV            S7, S2, S6                                             ; +0x634, 0x553e4\nLDUR            S2, [X29,#var_AC]                                      ; +0x638, 0x553e8\nMOV             W9, #0x43AA0000                                        ; +0x63c, 0x553ec\nFMOV            S3, W9                                                 ; +0x640, 0x553f0\nFMUL            S2, S2, S3                                             ; +0x644, 0x553f4\nFMSUB           S1, S7, S1, S2                                         ; +0x648, 0x553f8\nFDIV            S1, S1, S2                                             ; +0x64c, 0x553fc\nSTR             S1, [X19,#0x7C]                                        ; +0x650, 0x55400\nLDR             S2, [X26,#dword_2F05C@PAGEOFF]                         ; +0x654, 0x55404\nFCMP            S1, S2                                                 ; +0x658, 0x55408\nB.GE            loc_5541C                                              ; +0x65c, 0x5540c\nMOV             W9, #0x358637BD                                        ; +0x660, 0x55410\nSTR             W9, [X19,#0x7C]                                        ; +0x668, 0x55418\nADD             X21, X21, #1                                           ; +0x66c, 0x5541c\nB               loc_55124                                              ; +0x670, 0x55420\nMADD            X8, X10, X12, X9                                       ; +0x674, 0x55424\nLDR             W8, [X8,#4]                                            ; +0x678, 0x55428\nSTR             W8, [X19,#0x78]                                        ; +0x67c, 0x5542c\nFMOV            S0, W8                                                 ; +0x680, 0x55430\nB               loc_55200                                              ; +0x684, 0x55434\nLDUR            S3, [X9,#-0xC]                                         ; +0x688, 0x55438\nLDR             S4, [X9]                                               ; +0x68c, 0x5543c\nFSUB            S2, S8, S0                                             ; +0x690, 0x55440\nFSUB            S0, S1, S0                                             ; +0x694, 0x55444\nFDIV            S0, S2, S0                                             ; +0x698, 0x55448\nFMSUB           S1, S0, S3, S3                                         ; +0x69c, 0x5544c\nFMADD           S0, S4, S0, S1                                         ; +0x6a0, 0x55450\nB               loc_551FC                                              ; +0x6a4, 0x55454\nMOVI            V0.2D, #0                                              ; +0x6a8, 0x55458\nSTR             Q0, [SP,#0xE00+var_C0]                                 ; +0x6ac, 0x5545c\nSTR             Q0, [SP,#0xE00+var_D0]                                 ; +0x6b0, 0x55460\nSTR             Q0, [SP,#0xE00+var_E0]                                 ; +0x6b4, 0x55464\nSTR             Q0, [SP,#0xE00+var_F0]                                 ; +0x6b8, 0x55468\nSTR             Q0, [SP,#0xE00+var_100]                                ; +0x6bc, 0x5546c\nSTR             Q0, [SP,#0xE00+var_110]                                ; +0x6c0, 0x55470\nSTR             Q0, [SP,#0xE00+var_120]                                ; +0x6c4, 0x55474\nSTR             Q0, [SP,#0xE00+var_130]                                ; +0x6c8, 0x55478\nSTR             Q0, [SP,#0xE00+var_140]                                ; +0x6cc, 0x5547c\nSTR             Q0, [SP,#0xE00+var_150]                                ; +0x6d0, 0x55480\nSTR             Q0, [SP,#0xE00+var_160]                                ; +0x6d4, 0x55484\nSTR             Q0, [SP,#0xE00+var_170]                                ; +0x6d8, 0x55488\nSTR             Q0, [SP,#0xE00+var_180]                                ; +0x6dc, 0x5548c\nSTR             Q0, [SP,#0xE00+var_190]                                ; +0x6e0, 0x55490\nSTR             Q0, [SP,#0xE00+var_1A0]                                ; +0x6e4, 0x55494\nSTR             Q0, [SP,#0xE00+var_1B0]                                ; +0x6e8, 0x55498\nLDR             X8, [X19]                                              ; +0x6ec, 0x5549c\nADD             X1, SP, #0xE00+var_1B4                                 ; +0x6f0, 0x554a0\nMOV             X0, X19                                                ; +0x6f4, 0x554a4\nLDR             X8, [X8,#0x1F8]                                        ; +0x6f8, 0x554a8\nBLR             X8                                                     ; +0x6fc, 0x554ac\nCBNZ            W0, loc_55C2C                                          ; +0x700, 0x554b0\nLDR             X8, [X19,#8]                                           ; +0x704, 0x554b4\nMOV             W9, #0x10DF0                                           ; +0x708, 0x554b8\nMOV             W10, #0xA70                                            ; +0x710, 0x554c0\nLDR             W9, [X8,X9]                                            ; +0x714, 0x554c4\nMOVK            W10, #1,LSL#16                                         ; +0x718, 0x554c8\nFMOV            S4, #1.0                                               ; +0x71c, 0x554cc\nADD             X21, X8, X10                                           ; +0x720, 0x554d0\nCMP             W9, #1                                                 ; +0x724, 0x554d4\nB.NE            loc_5551C                                              ; +0x728, 0x554d8\nLDP             S3, S2, [X19,#0x80]                                    ; +0x72c, 0x554dc\nLDURB           W9, [X29,#var_A4+2]                                    ; +0x730, 0x554e0\nLDR             S7, [X19,#0x88]                                        ; +0x734, 0x554e4\nTBNZ            W9, #2, loc_55534                                      ; +0x738, 0x554e8\nLDP             S17, S18, [X21]                                        ; +0x73c, 0x554ec\nLDR             S19, [X21,#8]                                          ; +0x740, 0x554f0\nLDR             W8, [X8,#0x78]                                         ; +0x744, 0x554f4\nLDP             S1, S0, [X21,#0x48]                                    ; +0x748, 0x554f8\nLDR             S16, [X21,#0x50]                                       ; +0x74c, 0x554fc\nLDP             S4, S6, [X21,#0x60]                                    ; +0x750, 0x55500\nLDR             S5, [X21,#0x68]                                        ; +0x754, 0x55504\nFSUB            S3, S3, S17                                            ; +0x758, 0x55508\nFSUB            S2, S2, S18                                            ; +0x75c, 0x5550c\nFSUB            S7, S7, S19                                            ; +0x760, 0x55510\nAND             W8, W8, #4                                             ; +0x764, 0x55514\nB               loc_55558                                              ; +0x768, 0x55518\nMOV             W26, WZR                                               ; +0x76c, 0x5551c\nFMOV            S8, WZR                                                ; +0x770, 0x55520\nFMOV            S9, WZR                                                ; +0x774, 0x55524\nFMOV            S0, WZR                                                ; +0x778, 0x55528\nSTR             S0, [SP,#0xE00+var_DD4]                                ; +0x77c, 0x5552c\nB               loc_5575C                                              ; +0x780, 0x55530\nLDR             W9, [X8,#0x78]                                         ; +0x784, 0x55534\nFMOV            S0, WZR                                                ; +0x788, 0x55538\nMOV             V16.16B, V4.16B                                        ; +0x78c, 0x5553c\nFMOV            S1, WZR                                                ; +0x790, 0x55540\nTST             W9, #4                                                 ; +0x794, 0x55544\nFMOV            S5, WZR                                                ; +0x798, 0x55548\nAND             W8, W9, #4                                             ; +0x79c, 0x5554c\nFCSEL           S4, S4, S11, EQ                                        ; +0x7a0, 0x55550\nFMOV            S6, WZR                                                ; +0x7a4, 0x55554\nFNEG            S18, S16                                               ; +0x7a8, 0x55558\nFNEG            S19, S7                                                ; +0x7ac, 0x5555c\nCMP             W8, #0                                                 ; +0x7b0, 0x55560\nFMUL            S20, S2, S2                                            ; +0x7b4, 0x55564\nFCSEL           S19, S7, S19, EQ                                       ; +0x7b8, 0x55568\nFCSEL           S7, S16, S18, EQ                                       ; +0x7bc, 0x5556c\nFMADD           S16, S3, S3, S20                                       ; +0x7c0, 0x55570\nFMADD           S16, S19, S19, S16                                     ; +0x7c4, 0x55574\nFSQRT           S20, S16                                               ; +0x7c8, 0x55578\nFMOV            S17, WZR                                               ; +0x7cc, 0x5557c\nFCMP            S20, #0.0                                              ; +0x7d0, 0x55580\nFMOV            S18, WZR                                               ; +0x7d4, 0x55584\nFMOV            S16, WZR                                               ; +0x7d8, 0x55588\nB.LE            loc_555A4                                              ; +0x7dc, 0x5558c\nFMOV            S16, #1.0                                              ; +0x7e0, 0x55590\nFDIV            S17, S16, S20                                          ; +0x7e4, 0x55594\nFMUL            S16, S3, S17                                           ; +0x7e8, 0x55598\nFMUL            S18, S2, S17                                           ; +0x7ec, 0x5559c\nFMUL            S17, S19, S17                                          ; +0x7f0, 0x555a0\nADRP            X8, #dword_2EF74@PAGE                                  ; +0x7f4, 0x555a4\nLDR             S3, [X8,#dword_2EF74@PAGEOFF]                          ; +0x7f8, 0x555a8\nFMUL            S2, S17, S5                                            ; +0x7fc, 0x555ac\nFMADD           S2, S18, S6, S2                                        ; +0x800, 0x555b0\nFMADD           S2, S16, S4, S2                                        ; +0x804, 0x555b4\nFCMP            S2, S3                                                 ; +0x808, 0x555b8\nMOV             W0, #0x24 ; '$'                                        ; +0x80c, 0x555bc\nB.GT            loc_55C2C                                              ; +0x810, 0x555c0\nADRP            X8, #dword_2EFCC@PAGE                                  ; +0x814, 0x555c4\nLDR             S4, [X8,#dword_2EFCC@PAGEOFF]                          ; +0x818, 0x555c8\nFCMP            S2, S4                                                 ; +0x81c, 0x555cc\nB.LT            loc_55C2C                                              ; +0x820, 0x555d0\nFMUL            S5, S17, S7                                            ; +0x824, 0x555d4\nFMADD           S0, S18, S0, S5                                        ; +0x828, 0x555d8\nFMADD           S0, S16, S1, S0                                        ; +0x82c, 0x555dc\nFCMP            S0, S3                                                 ; +0x830, 0x555e0\nMOV             W0, #0x24 ; '$'                                        ; +0x834, 0x555e4\nB.GT            loc_55C2C                                              ; +0x838, 0x555e8\nFCMP            S0, S4                                                 ; +0x83c, 0x555ec\nB.LT            loc_55C2C                                              ; +0x840, 0x555f0\nFMOV            S10, #1.0                                              ; +0x844, 0x555f4\nFMINNM          S1, S2, S10                                            ; +0x848, 0x555f8\nFMINNM          S0, S0, S10                                            ; +0x84c, 0x555fc\nFMAXNM          S8, S1, S11                                            ; +0x850, 0x55600\nFMAXNM          S9, S0, S11                                            ; +0x854, 0x55604\nMOV             V0.16B, V8.16B                                         ; +0x858, 0x55608\nMOV             V1.16B, V9.16B                                         ; +0x85c, 0x5560c\nBL              sub_55D20                                              ; +0x860, 0x55610\nSTR             S0, [SP,#0xE00+var_DD4]                                ; +0x864, 0x55614\nMOV             V0.16B, V9.16B; x                                      ; +0x868, 0x55618\nBL              .acosf                                                 ; +0x86c, 0x5561c\nADRP            X8, #dword_2EF54@PAGE                                  ; +0x870, 0x55620\nLDR             S1, [X8,#dword_2EF54@PAGEOFF]                          ; +0x874, 0x55624\nFMUL            S0, S0, S1                                             ; +0x878, 0x55628\nSTR             S0, [X19,#0x100]                                       ; +0x87c, 0x5562c\nLDR             S0, [X19,#0xEC]                                        ; +0x880, 0x55630\nLDR             W8, [SP,#0xE00+var_1B4]                                ; +0x884, 0x55634\nFCMP            S0, #0.0                                               ; +0x888, 0x55638\nCCMP            W8, #1, #0, NE                                         ; +0x88c, 0x5563c\nB.EQ            loc_5564C                                              ; +0x890, 0x55640\nMOV             W26, WZR                                               ; +0x894, 0x55644\nB               loc_55658                                              ; +0x898, 0x55648\nMOV             W8, #2                                                 ; +0x89c, 0x5564c\nMOV             W26, #1                                                ; +0x8a0, 0x55650\nSTR             W8, [SP,#0xE00+var_1B4]                                ; +0x8a4, 0x55654\nADRP            X9, #dword_2EEE4@PAGE                                  ; +0x8a8, 0x55658\nLDR             S1, [X9,#dword_2EEE4@PAGEOFF]                          ; +0x8ac, 0x5565c\nFCMP            S0, #0.0                                               ; +0x8b0, 0x55660\nSXTW            X22, W8                                                ; +0x8b4, 0x55664\nCSET            W9, EQ                                                 ; +0x8b8, 0x55668\nSUBS            W8, W8, #1                                             ; +0x8bc, 0x5566c\nADRP            X25, #jpt_556D4@PAGE                                   ; +0x8c0, 0x55670\nFMUL            S13, S0, S1                                            ; +0x8c4, 0x55674\nSCVTF           S0, W8                                                 ; +0x8c8, 0x55678\nCSET            W8, EQ                                                 ; +0x8cc, 0x5567c\nADRP            X28, #flt_2F174@PAGE                                   ; +0x8d0, 0x55680\nMOV             X20, XZR                                               ; +0x8d4, 0x55684\nADD             X23, SP, #0xE00+var_130                                ; +0x8d8, 0x55688\nADD             X24, SP, #0xE00+var_1B0                                ; +0x8dc, 0x5568c\nADD             X25, X25, #jpt_556D4@PAGEOFF                           ; +0x8e0, 0x55690\nFMOV            S12, WZR                                               ; +0x8e4, 0x55694\nORR             W27, W9, W8                                            ; +0x8e8, 0x55698\nFDIV            S14, S10, S0                                           ; +0x8ec, 0x5569c\nADD             X28, X28, #flt_2F174@PAGEOFF                           ; +0x8f0, 0x556a0\nCMP             X20, X22                                               ; +0x8f4, 0x556a4\nB.GE            loc_5575C                                              ; +0x8f8, 0x556a8\nCBZ             W27, loc_556BC                                         ; +0x8fc, 0x556ac\nSTR             S8, [X23,X20,LSL#2]                                    ; +0x900, 0x556b0\nMOV             V0.16B, V9.16B                                         ; +0x904, 0x556b4\nB               loc_55750                                              ; +0x908, 0x556b8\nSUB             W8, W22, #4; switch 9 cases                            ; +0x90c, 0x556bc\nCMP             W8, #8                                                 ; +0x910, 0x556c0\nB.HI            def_556D4; jumptable 00000000000556D4 default case, cases 5,7,9-11 ; +0x914, 0x556c4\nADR             X9, loc_556D8; jumptable 00000000000556D4 cases 8,12   ; +0x918, 0x556c8\nLDRB            W10, [X25,X8]                                          ; +0x91c, 0x556cc\nADD             X9, X9, X10,LSL#2                                      ; +0x920, 0x556d0\nBR              X9; switch jump                                        ; +0x924, 0x556d4\nCMP             W20, #8; jumptable 00000000000556D4 cases 8,12         ; +0x928, 0x556d8\nFMOV            S0, WZR                                                ; +0x92c, 0x556dc\nB.CS            loc_55728                                              ; +0x930, 0x556e0\nLDR             S0, [X28,X20,LSL#2]                                    ; +0x934, 0x556e4\nB               loc_55728                                              ; +0x938, 0x556e8\nCMP             X20, #1; jumptable 00000000000556D4 case 4             ; +0x93c, 0x556ec\nFCSEL           S0, S10, S12, EQ                                       ; +0x940, 0x556f0\nCMP             X20, #0                                                ; +0x944, 0x556f4\nFCSEL           S0, S11, S0, EQ                                        ; +0x948, 0x556f8\nB               loc_55728                                              ; +0x94c, 0x556fc\nSCVTF           S0, W20; jumptable 00000000000556D4 default case, cases 5,7,9-11 ; +0x950, 0x55700\nFADD            S0, S0, S0                                             ; +0x954, 0x55704\nFMADD           S0, S0, S14, S11                                       ; +0x958, 0x55708\nB               loc_55728                                              ; +0x95c, 0x5570c\nCMP             W20, #6; jumptable 00000000000556D4 case 6             ; +0x960, 0x55710\nFMOV            S0, WZR                                                ; +0x964, 0x55714\nB.CS            loc_55728                                              ; +0x968, 0x55718\nADRL            X8, flt_2F15C                                          ; +0x96c, 0x5571c\nLDR             S0, [X8,X20,LSL#2]                                     ; +0x974, 0x55724\nFMUL            S0, S13, S0; x                                         ; +0x978, 0x55728\nADD             X0, SP, #0xE00+sinx; sinx                              ; +0x97c, 0x5572c\nADD             X1, SP, #0xE00+cosx; cosx                              ; +0x980, 0x55730\nBL              .sincosf                                               ; +0x984, 0x55734\nLDP             S1, S0, [SP,#0xE00+cosx]                               ; +0x988, 0x55738\nFMUL            S2, S0, S9                                             ; +0x98c, 0x5573c\nFMUL            S0, S0, S8                                             ; +0x990, 0x55740\nFNMSUB          S2, S1, S8, S2                                         ; +0x994, 0x55744\nFMADD           S0, S1, S9, S0                                         ; +0x998, 0x55748\nSTR             S2, [X23,X20,LSL#2]                                    ; +0x99c, 0x5574c\nSTR             S0, [X24,X20,LSL#2]                                    ; +0x9a0, 0x55750\nADD             X20, X20, #1                                           ; +0x9a4, 0x55754\nB               loc_556A4                                              ; +0x9a8, 0x55758\nLDR             W22, [X21,#0x8CC]                                      ; +0x9ac, 0x5575c\nSUB             W8, W22, #1                                            ; +0x9b0, 0x55760\nCMP             W8, #2                                                 ; +0x9b4, 0x55764\nB.CC            loc_55C10                                              ; +0x9b8, 0x55768\nADD             X0, SP, #0xE00+var_7B8                                 ; +0x9bc, 0x5576c\nBL              sub_57994                                              ; +0x9c0, 0x55770\nSUB             W8, W22, #3; switch 6 cases                            ; +0x9c4, 0x55774\nCMP             W8, #5                                                 ; +0x9c8, 0x55778\nSTR             W26, [SP,#0xE00+var_DE8]                               ; +0x9cc, 0x5577c\nB.HI            def_557A0; jumptable 00000000000557A0 default case     ; +0x9d0, 0x55780\nADRL            X9, jpt_557A0                                          ; +0x9d4, 0x55784\nADR             X10, loc_557A4; jumptable 00000000000557A0 cases 4,5   ; +0x9dc, 0x5578c\nLDRB            W11, [X9,X8]                                           ; +0x9e0, 0x55790\nADD             X10, X10, X11,LSL#2                                    ; +0x9e4, 0x55794\nMOV             W20, #5                                                ; +0x9e8, 0x55798\nMOV             W8, #2                                                 ; +0x9ec, 0x5579c\nBR              X10; switch jump                                       ; +0x9f0, 0x557a0\nMOV             W8, W22; jumptable 00000000000557A0 cases 4,5          ; +0x9f4, 0x557a4\nB               loc_557B0; jumptable 00000000000557A0 case 3           ; +0x9f8, 0x557a8\nMOV             W8, WZR; jumptable 00000000000557A0 default case       ; +0x9fc, 0x557ac\nADD             X23, X19, #0x38 ; '8'; jumptable 00000000000557A0 case 3 ; +0xa00, 0x557b0\nADD             X9, X19, #0x40 ; '@'                                   ; +0xa04, 0x557b4\nMOV             W24, #0xFFFFFFFF                                       ; +0xa08, 0x557b8\nMOV             W20, W8                                                ; +0xa0c, 0x557bc\nSTR             X9, [SP,#0xE00+var_DF8]                                ; +0xa10, 0x557c0\nSTR             W8, [SP,#0xE00+var_DE4]                                ; +0xa14, 0x557c4\nB               loc_55840                                              ; +0xa18, 0x557c8\nMOV             W22, #8; jumptable 00000000000557A0 case 7             ; +0xa1c, 0x557cc\nMOV             W20, #7                                                ; +0xa20, 0x557d0\nB               loc_557E0; jumptable 00000000000557A0 case 6           ; +0xa24, 0x557d4\nMOV             W22, #0xC; jumptable 00000000000557A0 case 8           ; +0xa28, 0x557d8\nMOV             W20, #0xB                                              ; +0xa2c, 0x557dc\nMOV             X9, X19; jumptable 00000000000557A0 case 6             ; +0xa30, 0x557e0\nLDR             X8, [X9,#0x40]!                                        ; +0xa34, 0x557e4\nSTR             W22, [SP,#0xE00+var_DE4]                               ; +0xa38, 0x557e8\nSUB             X23, X9, #8                                            ; +0xa3c, 0x557ec\nSTR             X9, [SP,#0xE00+var_DF8]                                ; +0xa40, 0x557f0\nCBZ             X8, loc_5583C                                          ; +0xa44, 0x557f4\nLDRB            W8, [X21,#0x988]                                       ; +0xa48, 0x557f8\nCBZ             W8, loc_5583C                                          ; +0xa4c, 0x557fc\nADD             X8, SP, #0xE00+var_7B8                                 ; +0xa50, 0x55800\nMOV             X21, XZR                                               ; +0xa54, 0x55804\nADD             X22, X8, #0x180                                        ; +0xa58, 0x55808\nMOV             W24, #3                                                ; +0xa5c, 0x5580c\nLDRSW           X8, [SP,#0xE00+var_1B4]                                ; +0xa60, 0x55810\nCMP             X21, X8                                                ; +0xa64, 0x55814\nB.GE            loc_55840                                              ; +0xa68, 0x55818\nADD             X0, SP, #0xE00+var_DB8                                 ; +0xa6c, 0x5581c\nMOV             W1, W21                                                ; +0xa70, 0x55820\nSTP             X23, X24, [SP,#0xE00+var_DB8]                          ; +0xa74, 0x55824\nBL              sub_55D90                                              ; +0xa78, 0x55828\nLDR             W8, [X0]                                               ; +0xa7c, 0x5582c\nSTR             W8, [X22,X21,LSL#2]                                    ; +0xa80, 0x55830\nADD             X21, X21, #1                                           ; +0xa84, 0x55834\nB               loc_55810                                              ; +0xa88, 0x55838\nMOV             W24, #3                                                ; +0xa8c, 0x5583c\nLDR             S15, [X19,#0xF0]                                       ; +0xa90, 0x55840\nFCMP            S15, #0.0                                              ; +0xa94, 0x55844\nB.LE            loc_55AB0                                              ; +0xa98, 0x55848\nADRP            X8, #dword_2F070@PAGE                                  ; +0xa9c, 0x5584c\nMOV             W10, W20                                               ; +0xaa0, 0x55850\nSTR             X10, [SP,#0xE00+var_DF0]                               ; +0xaa4, 0x55854\nLDR             W10, [SP,#0xE00+var_DE4]                               ; +0xaa8, 0x55858\nLDR             S1, [X8,#dword_2F070@PAGEOFF]                          ; +0xaac, 0x5585c\nLDRSW           X26, [SP,#0xE00+var_1B4]                               ; +0xab0, 0x55860\nSCVTF           S0, W20                                                ; +0xab4, 0x55864\nADD             W9, W20, #1                                            ; +0xab8, 0x55868\nMOV             W16, #0x1580                                           ; +0xabc, 0x5586c\nMOV             X21, XZR                                               ; +0xac0, 0x55870\nMOV             W28, W10                                               ; +0xac4, 0x55874\nADD             X22, SP, #0xE00+var_7B8                                ; +0xac8, 0x55878\nADD             X15, SP, #0xE00+var_1B0                                ; +0xacc, 0x5587c\nADD             X25, SP, #0xE00+var_130                                ; +0xad0, 0x55880\nFMOV            S13, WZR                                               ; +0xad4, 0x55884\nMOVK            W16, #1,LSL#16                                         ; +0xad8, 0x55888\nMOV             W20, #0x3F800000                                       ; +0xadc, 0x5588c\nFMOV            S10, #8.0                                              ; +0xae0, 0x55890\nFDIV            S14, S1, S0                                            ; +0xae4, 0x55894\nSUB             X8, X9, #1                                             ; +0xae8, 0x55898\nADD             X27, SP, #0xE00+var_7B8                                ; +0xaec, 0x5589c\nSTR             X8, [SP,#0xE00+var_DE0]                                ; +0xaf0, 0x558a0\nCMP             X21, X26                                               ; +0xaf4, 0x558a4\nB.GE            loc_55AB0                                              ; +0xaf8, 0x558a8\nLDR             S11, [X15,X21,LSL#2]                                   ; +0xafc, 0x558ac\nLDR             S12, [X25,X21,LSL#2]                                   ; +0xb00, 0x558b0\nFCMP            S11, #0.0                                              ; +0xb04, 0x558b4\nCSET            W8, NE                                                 ; +0xb08, 0x558b8\nFCMP            S12, #0.0                                              ; +0xb0c, 0x558bc\nCSET            W9, NE                                                 ; +0xb10, 0x558c0\nORR             W8, W8, W9                                             ; +0xb14, 0x558c4\nTBNZ            W8, #0, loc_55910                                      ; +0xb18, 0x558c8\nMOV             W10, #0x1368                                           ; +0xb1c, 0x558cc\nMOV             X8, X24                                                ; +0xb20, 0x558d0\nMOV             X9, X27                                                ; +0xb24, 0x558d4\nMOVK            W10, #1,LSL#16                                         ; +0xb28, 0x558d8\nMOV             X11, X28                                               ; +0xb2c, 0x558dc\nCBZ             X11, loc_55AA4                                         ; +0xb30, 0x558e0\nLDR             X12, [X19,#8]                                          ; +0xb34, 0x558e4\nSUB             X11, X11, #1                                           ; +0xb38, 0x558e8\nLDRB            W12, [X12,X10]                                         ; +0xb3c, 0x558ec\nADD             X10, X10, #0x30 ; '0'                                  ; +0xb40, 0x558f0\nCMP             W12, #0                                                ; +0xb44, 0x558f4\nCCMP            X8, #0, #4, NE                                         ; +0xb48, 0x558f8\nFCSEL           S0, S13, S14, EQ                                       ; +0xb4c, 0x558fc\nSTR             S0, [X9],#0x80                                         ; +0xb50, 0x55900\nSUB             X8, X8, #1                                             ; +0xb54, 0x55904\nCBNZ            X11, loc_558E4                                         ; +0xb58, 0x55908\nB               loc_55AA4                                              ; +0xb5c, 0x5590c\nLDR             S0, [SP,#0xE00+var_DD4]                                ; +0xb60, 0x55910\nFCMP            S11, S9                                                ; +0xb64, 0x55914\nFCCMP           S12, S8, #0, EQ                                        ; +0xb68, 0x55918\nB.EQ            loc_55938                                              ; +0xb6c, 0x5591c\nMOV             V0.16B, V12.16B                                        ; +0xb70, 0x55920\nMOV             V1.16B, V11.16B                                        ; +0xb74, 0x55924\nBL              sub_55D20                                              ; +0xb78, 0x55928\nMOV             W16, #0x11580                                          ; +0xb7c, 0x5592c\nADD             X15, SP, #0xE00+var_1B0                                ; +0xb84, 0x55934\nLDR             X9, [X19,#8]                                           ; +0xb88, 0x55938\nADD             X8, X9, X16                                            ; +0xb8c, 0x5593c\nLDR             X10, [X8]                                              ; +0xb90, 0x55940\nCBZ             X10, loc_55AA4                                         ; +0xb94, 0x55944\nLDR             X8, [X8,#8]                                            ; +0xb98, 0x55948\nCBZ             X8, loc_559C4                                          ; +0xb9c, 0x5594c\nLDR             X13, [SP,#0xE00+var_DE0]                               ; +0xba0, 0x55950\nMOV             W8, #0x11588                                           ; +0xba4, 0x55954\nFADD            S1, S0, S10                                            ; +0xbac, 0x5595c\nADD             X12, X9, X8                                            ; +0xbb0, 0x55960\nMOV             X8, X10                                                ; +0xbb4, 0x55964\nCBZ             X13, loc_55AA4                                         ; +0xbb8, 0x55968\nCBZ             X8, loc_559D4                                          ; +0xbbc, 0x5596c\nLDR             X14, [X12]                                             ; +0xbc0, 0x55970\nLDR             S2, [X8,#0x20]                                         ; +0xbc4, 0x55974\nCMP             X14, #0                                                ; +0xbc8, 0x55978\nCSEL            X11, X10, X14, EQ                                      ; +0xbcc, 0x5597c\nLDR             S3, [X11,#0x20]                                        ; +0xbd0, 0x55980\nFCMP            S2, S3                                                 ; +0xbd4, 0x55984\nB.EQ            loc_559B0                                              ; +0xbd8, 0x55988\nFADD            S4, S3, S10                                            ; +0xbdc, 0x5598c\nFCMP            S3, S2                                                 ; +0xbe0, 0x55990\nFCSEL           S3, S3, S4, GE                                         ; +0xbe4, 0x55994\nFCMP            S2, S0                                                 ; +0xbe8, 0x55998\nFCCMP           S3, S0, #4, LE                                         ; +0xbec, 0x5599c\nB.GT            loc_55A04                                              ; +0xbf0, 0x559a0\nFCMP            S1, S2                                                 ; +0xbf4, 0x559a4\nFCCMP           S1, S3, #0, GE                                         ; +0xbf8, 0x559a8\nB.LT            loc_55A04                                              ; +0xbfc, 0x559ac\nSUB             X13, X13, #1                                           ; +0xc00, 0x559b0\nADD             X12, X12, #8                                           ; +0xc04, 0x559b4\nMOV             X8, X14                                                ; +0xc08, 0x559b8\nCBNZ            X13, loc_5596C                                         ; +0xc0c, 0x559bc\nB               loc_55AA4                                              ; +0xc10, 0x559c0\nLDRSW           X8, [X10,#4]                                           ; +0xc14, 0x559c4\nADD             X8, X22, X8,LSL#7                                      ; +0xc18, 0x559c8\nSTR             W20, [X8,X21,LSL#2]                                    ; +0xc1c, 0x559cc\nB               loc_55AA4                                              ; +0xc20, 0x559d0\nADD             X8, X9, X16                                            ; +0xc24, 0x559d4\nLDR             X9, [SP,#0xE00+var_DF0]                                ; +0xc28, 0x559d8\nCBZ             X9, loc_55AA4                                          ; +0xc2c, 0x559dc\nLDR             X10, [X8]                                              ; +0xc30, 0x559e0\nCBZ             X10, loc_55AA4                                         ; +0xc34, 0x559e4\nLDRSW           X10, [X10,#4]                                          ; +0xc38, 0x559e8\nSUB             X9, X9, #1                                             ; +0xc3c, 0x559ec\nADD             X8, X8, #8                                             ; +0xc40, 0x559f0\nADD             X10, X22, X10,LSL#7                                    ; +0xc44, 0x559f4\nSTR             W20, [X10,X21,LSL#2]                                   ; +0xc48, 0x559f8\nCBNZ            X9, loc_559E0                                          ; +0xc4c, 0x559fc\nB               loc_55AA4                                              ; +0xc50, 0x55a00\nLDRB            W9, [X8,#0x29]                                         ; +0xc54, 0x55a04\nCBZ             W9, loc_55A5C                                          ; +0xc58, 0x55a08\nLDR             S0, [X11,#0x14]                                        ; +0xc5c, 0x55a0c\nLDR             S1, [X11,#0x1C]                                        ; +0xc60, 0x55a10\nLDR             S2, [X8,#0x1C]                                         ; +0xc64, 0x55a14\nLDR             S3, [X8,#0x2C]                                         ; +0xc68, 0x55a18\nFMUL            S0, S0, S11                                            ; +0xc6c, 0x55a1c\nFNMSUB          S0, S1, S12, S0                                        ; +0xc70, 0x55a20\nLDR             S1, [X8,#0x14]                                         ; +0xc74, 0x55a24\nFMUL            S2, S2, S12                                            ; +0xc78, 0x55a28\nLDRSW           X8, [X8,#4]                                            ; +0xc7c, 0x55a2c\nFNMSUB          S1, S1, S11, S2                                        ; +0xc80, 0x55a30\nFMUL            S2, S0, S0                                             ; +0xc84, 0x55a34\nFMADD           S2, S1, S1, S2                                         ; +0xc88, 0x55a38\nFSQRT           S2, S2                                                 ; +0xc8c, 0x55a3c\nFDIV            S2, S3, S2                                             ; +0xc90, 0x55a40\nFMUL            S0, S2, S0                                             ; +0xc94, 0x55a44\nADD             X8, X22, X8,LSL#7                                      ; +0xc98, 0x55a48\nSTR             S0, [X8,X21,LSL#2]                                     ; +0xc9c, 0x55a4c\nLDRSW           X8, [X11,#4]                                           ; +0xca0, 0x55a50\nFMUL            S0, S2, S1                                             ; +0xca4, 0x55a54\nB               loc_55A9C                                              ; +0xca8, 0x55a58\nLDR             S0, [X8,#0x14]                                         ; +0xcac, 0x55a5c\nLDR             S1, [X8,#0x1C]                                         ; +0xcb0, 0x55a60\nLDRSW           X8, [X8,#4]                                            ; +0xcb4, 0x55a64\nFMOV            S3, #0.5                                               ; +0xcb8, 0x55a68\nFMUL            S0, S0, S12                                            ; +0xcbc, 0x55a6c\nFMADD           S0, S1, S11, S0                                        ; +0xcc0, 0x55a70\nFMOV            S1, #2.0                                               ; +0xcc4, 0x55a74\nFMSUB           S1, S0, S0, S1                                         ; +0xcc8, 0x55a78\nFSQRT           S1, S1                                                 ; +0xccc, 0x55a7c\nFADD            S2, S1, S0                                             ; +0xcd0, 0x55a80\nFMUL            S2, S2, S3                                             ; +0xcd4, 0x55a84\nADD             X8, X22, X8,LSL#7                                      ; +0xcd8, 0x55a88\nSTR             S2, [X8,X21,LSL#2]                                     ; +0xcdc, 0x55a8c\nLDRSW           X8, [X11,#4]                                           ; +0xce0, 0x55a90\nFSUB            S0, S1, S0                                             ; +0xce4, 0x55a94\nFMUL            S0, S0, S3                                             ; +0xce8, 0x55a98\nADD             X8, X22, X8,LSL#7                                      ; +0xcec, 0x55a9c\nSTR             S0, [X8,X21,LSL#2]                                     ; +0xcf0, 0x55aa0\nADD             X21, X21, #1                                           ; +0xcf4, 0x55aa4\nADD             X27, X27, #4                                           ; +0xcf8, 0x55aa8\nB               loc_558A4                                              ; +0xcfc, 0x55aac\nLDR             W27, [SP,#0xE00+var_DE4]                               ; +0xd00, 0x55ab0\nFMOV            S8, #1.0                                               ; +0xd04, 0x55ab4\nFCMP            S15, S8                                                ; +0xd08, 0x55ab8\nB.GE            loc_55BAC                                              ; +0xd0c, 0x55abc\nLDR             X8, [SP,#0xE00+var_DF8]                                ; +0xd10, 0x55ac0\nLDR             X8, [X8]                                               ; +0xd14, 0x55ac4\nCBZ             X8, loc_55B2C                                          ; +0xd18, 0x55ac8\nMOV             X21, XZR                                               ; +0xd1c, 0x55acc\nMOV             W20, W27                                               ; +0xd20, 0x55ad0\nADD             X22, SP, #0xE00+var_DB8                                ; +0xd24, 0x55ad4\nLDRSW           X9, [SP,#0xE00+var_1B4]                                ; +0xd28, 0x55ad8\nCMP             X21, X9                                                ; +0xd2c, 0x55adc\nB.GE            loc_55B50                                              ; +0xd30, 0x55ae0\nMOV             X25, XZR                                               ; +0xd34, 0x55ae4\nMOV             X26, X22                                               ; +0xd38, 0x55ae8\nCMP             X20, X25                                               ; +0xd3c, 0x55aec\nB.EQ            loc_55B20                                              ; +0xd40, 0x55af0\nCMP             X24, X25                                               ; +0xd44, 0x55af4\nFMOV            S0, WZR                                                ; +0xd48, 0x55af8\nB.EQ            loc_55B14                                              ; +0xd4c, 0x55afc\nADD             X0, SP, #0xE00+var_DC8                                 ; +0xd50, 0x55b00\nMOV             W1, W21                                                ; +0xd54, 0x55b04\nSTP             X23, X25, [SP,#0xE00+var_DC8]                          ; +0xd58, 0x55b08\nBL              sub_55D90                                              ; +0xd5c, 0x55b0c\nLDR             S0, [X0]                                               ; +0xd60, 0x55b10\nSTR             S0, [X26],#0x80                                        ; +0xd64, 0x55b14\nADD             X25, X25, #1                                           ; +0xd68, 0x55b18\nB               loc_55AEC                                              ; +0xd6c, 0x55b1c\nADD             X21, X21, #1                                           ; +0xd70, 0x55b20\nADD             X22, X22, #4                                           ; +0xd74, 0x55b24\nB               loc_55AD8                                              ; +0xd78, 0x55b28\nADD             X0, SP, #0xE00+var_DB8                                 ; +0xd7c, 0x55b2c\nBL              sub_57994                                              ; +0xd80, 0x55b30\nLDR             W3, [SP,#0xE00+var_1B4]                                ; +0xd84, 0x55b34\nFMOV            S0, #1.0                                               ; +0xd88, 0x55b38\nADD             X0, SP, #0xE00+var_DB8                                 ; +0xd8c, 0x55b3c\nMOV             W1, WZR                                                ; +0xd90, 0x55b40\nMOV             W2, W27                                                ; +0xd94, 0x55b44\nBL              sub_AB134                                              ; +0xd98, 0x55b48\nLDR             W9, [SP,#0xE00+var_1B4]                                ; +0xd9c, 0x55b4c\nMOV             X8, XZR                                                ; +0xda0, 0x55b50\nFSUB            S0, S8, S15                                            ; +0xda4, 0x55b54\nSXTW            X9, W9                                                 ; +0xda8, 0x55b58\nMOV             W10, W27                                               ; +0xdac, 0x55b5c\nADD             X11, SP, #0xE00+var_7B8                                ; +0xdb0, 0x55b60\nADD             X12, SP, #0xE00+var_DB8                                ; +0xdb4, 0x55b64\nCMP             X8, X9                                                 ; +0xdb8, 0x55b68\nMOV             X13, X12                                               ; +0xdbc, 0x55b6c\nMOV             X14, X11                                               ; +0xdc0, 0x55b70\nMOV             X15, X10                                               ; +0xdc4, 0x55b74\nB.GE            loc_55BAC                                              ; +0xdc8, 0x55b78\nCBZ             X15, loc_55B9C                                         ; +0xdcc, 0x55b7c\nLDR             S1, [X14]                                              ; +0xdd0, 0x55b80\nLDR             S2, [X13],#0x80                                        ; +0xdd4, 0x55b84\nSUB             X15, X15, #1                                           ; +0xdd8, 0x55b88\nFMUL            S1, S1, S15                                            ; +0xddc, 0x55b8c\nFMADD           S1, S2, S0, S1                                         ; +0xde0, 0x55b90\nSTR             S1, [X14],#0x80                                        ; +0xde4, 0x55b94\nCBNZ            X15, loc_55B80                                         ; +0xde8, 0x55b98\nADD             X8, X8, #1                                             ; +0xdec, 0x55b9c\nADD             X11, X11, #4                                           ; +0xdf0, 0x55ba0\nADD             X12, X12, #4                                           ; +0xdf4, 0x55ba4\nB               loc_55B68                                              ; +0xdf8, 0x55ba8\nLDR             W8, [SP,#0xE00+var_DE8]                                ; +0xdfc, 0x55bac\nTBZ             W8, #0, loc_55BEC                                      ; +0xe00, 0x55bb0\nMOV             W9, #1                                                 ; +0xe04, 0x55bb4\nMOV             W8, W27                                                ; +0xe08, 0x55bb8\nSTR             W9, [SP,#0xE00+var_1B4]                                ; +0xe0c, 0x55bbc\nADD             X9, SP, #0xE00+var_7B8                                 ; +0xe10, 0x55bc0\nFMOV            S2, #0.5                                               ; +0xe14, 0x55bc4\nCBZ             X8, loc_55BE4                                          ; +0xe18, 0x55bc8\nLDP             S0, S1, [X9]                                           ; +0xe1c, 0x55bcc\nSUB             X8, X8, #1                                             ; +0xe20, 0x55bd0\nFADD            S0, S1, S0                                             ; +0xe24, 0x55bd4\nFMUL            S0, S0, S2                                             ; +0xe28, 0x55bd8\nSTR             S0, [X9],#0x80                                         ; +0xe2c, 0x55bdc\nCBNZ            X8, loc_55BCC                                          ; +0xe30, 0x55be0\nMOV             W3, #1                                                 ; +0xe34, 0x55be4\nB               loc_55BF0                                              ; +0xe38, 0x55be8\nLDR             W3, [SP,#0xE00+var_1B4]                                ; +0xe3c, 0x55bec\nLDR             X8, [X19]                                              ; +0xe40, 0x55bf0\nADD             X1, SP, #0xE00+var_7B8                                 ; +0xe44, 0x55bf4\nMOV             W4, #0x20 ; ' '                                        ; +0xe48, 0x55bf8\nMOV             X0, X19                                                ; +0xe4c, 0x55bfc\nLDR             X8, [X8,#0xC8]                                         ; +0xe50, 0x55c00\nMOV             W2, W27                                                ; +0xe54, 0x55c04\nMOV             W5, WZR                                                ; +0xe58, 0x55c08\nBLR             X8                                                     ; +0xe5c, 0x55c0c\nLDR             X8, [X19]                                              ; +0xe60, 0x55c10\nLDR             S0, [X19,#0x34]                                        ; +0xe64, 0x55c14\nMOV             X0, X19                                                ; +0xe68, 0x55c18\nLDR             X8, [X8,#0x48]                                         ; +0xe6c, 0x55c1c\nBLR             X8                                                     ; +0xe70, 0x55c20\nBL              sub_5790C                                              ; +0xe74, 0x55c24\nMOV             W0, WZR                                                ; +0xe78, 0x55c28\nADD             SP, SP, #0xD70                                         ; +0xe7c, 0x55c2c\nLDP             X29, X30, [SP,#0x90+var_s0]                            ; +0xe80, 0x55c30\nLDP             X20, X19, [SP,#0x90+var_10]                            ; +0xe84, 0x55c34\nLDP             X22, X21, [SP,#0x90+var_20]                            ; +0xe88, 0x55c38\nLDP             X24, X23, [SP,#0x90+var_30]                            ; +0xe8c, 0x55c3c\nLDP             X26, X25, [SP,#0x90+var_40]                            ; +0xe90, 0x55c40\nLDP             X28, X27, [SP,#0x90+var_50]                            ; +0xe94, 0x55c44\nLDP             D9, D8, [SP,#0x90+var_60]                              ; +0xe98, 0x55c48\nLDP             D11, D10, [SP,#0x90+var_70]                            ; +0xe9c, 0x55c4c\nLDP             D13, D12, [SP,#0x90+var_80]                            ; +0xea0, 0x55c50\nLDP             D15, D14, [SP+0x90+var_90],#0xA0                       ; +0xea4, 0x55c54\nRET                                                                    ; +0xea8, 0x55c58", "xrefs": ["sub_58380 @ 0x583c8", "sub_5B3B0 @ 0x5b4b8"], "is_objc": false, "is_arm32": false, "is_arm64": false, "bida_info": "8.0.0 @ https://github.com/Stazzical/BromaIDA", "bindings_info": "commit ba9f177b at Thu Jul 16 22:52:06 2026 from https://github.com/geode-sdk/bindings"}